| Message ID | 20240802214220.3472221-1-khilman@baylibre.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v3] firmware: ti_sci: add CPU latency constraint management | expand |
On 14:42-20240802, Kevin Hilman wrote: > During system-wide suspend, check if any of the CPUs have PM QoS > resume latency constraints set. If so, set TI SCI constraint. > > TI SCI has a single system-wide latency constraint, so use the max of > any of the CPU latencies as the system-wide value. > > Note: DM firmware clears all constraints at resume time, so > constraints need to be checked/updated/sent at each system suspend. > > Co-developed-by: Vibhore Vardhan <vibhore@ti.com> > Signed-off-by: Vibhore Vardhan <vibhore@ti.com> > Signed-off-by: Kevin Hilman <khilman@baylibre.com> > Reviewed-by: Dhruva Gole <d-gole@ti.com> > Signed-off-by: Dhruva Gole <d-gole@ti.com> > --- > Depends on the TI SCI series where support for the constraints APIs > are added: > https://lore.kernel.org/r/20240801195422.2296347-1-msp@baylibre.com > Unless there is a reason to maintain this patch separately, Could we add this to the mentioned series -> it is much easier to review and merge them in one go.
Nishanth Menon <nm@ti.com> writes: > On 14:42-20240802, Kevin Hilman wrote: >> During system-wide suspend, check if any of the CPUs have PM QoS >> resume latency constraints set. If so, set TI SCI constraint. >> >> TI SCI has a single system-wide latency constraint, so use the max of >> any of the CPU latencies as the system-wide value. >> >> Note: DM firmware clears all constraints at resume time, so >> constraints need to be checked/updated/sent at each system suspend. >> >> Co-developed-by: Vibhore Vardhan <vibhore@ti.com> >> Signed-off-by: Vibhore Vardhan <vibhore@ti.com> >> Signed-off-by: Kevin Hilman <khilman@baylibre.com> >> Reviewed-by: Dhruva Gole <d-gole@ti.com> >> Signed-off-by: Dhruva Gole <d-gole@ti.com> >> --- >> Depends on the TI SCI series where support for the constraints APIs >> are added: >> https://lore.kernel.org/r/20240801195422.2296347-1-msp@baylibre.com >> > > Unless there is a reason to maintain this patch separately, Could we > add this to the mentioned series -> it is much easier to review and > merge them in one go. Sure, they can be combined for the next version. Kevin
diff --git a/drivers/firmware/ti_sci.c b/drivers/firmware/ti_sci.c index c6544cc12417..097417526ff8 100644 --- a/drivers/firmware/ti_sci.c +++ b/drivers/firmware/ti_sci.c @@ -9,6 +9,7 @@ #define pr_fmt(fmt) "%s: " fmt, __func__ #include <linux/bitmap.h> +#include <linux/cpu.h> #include <linux/debugfs.h> #include <linux/export.h> #include <linux/io.h> @@ -19,6 +20,7 @@ #include <linux/of.h> #include <linux/of_platform.h> #include <linux/platform_device.h> +#include <linux/pm_qos.h> #include <linux/property.h> #include <linux/semaphore.h> #include <linux/slab.h> @@ -3640,7 +3642,25 @@ static int ti_sci_prepare_system_suspend(struct ti_sci_info *info) static int ti_sci_suspend(struct device *dev) { struct ti_sci_info *info = dev_get_drvdata(dev); - int ret; + struct device *cpu_dev; + s32 val, cpu_lat = 0; + int i, ret; + + if (info->fw_caps & MSG_FLAG_CAPS_LPM_DM_MANAGED) { + for_each_possible_cpu(i) { + cpu_dev = get_cpu_device(i); + val = dev_pm_qos_read_value(cpu_dev, DEV_PM_QOS_RESUME_LATENCY); + if (val != PM_QOS_RESUME_LATENCY_NO_CONSTRAINT) + cpu_lat = max(cpu_lat, val); + } + if (cpu_lat && (cpu_lat != PM_QOS_RESUME_LATENCY_NO_CONSTRAINT)) { + dev_dbg(cpu_dev, "%s: sending max CPU latency=%u\n", __func__, cpu_lat); + ret = ti_sci_cmd_set_latency_constraint(&info->handle, + cpu_lat, TISCI_MSG_CONSTRAINT_SET); + if (ret) + return ret; + } + } ret = ti_sci_prepare_system_suspend(info); if (ret)