| Message ID | 20240730-b4-upstream-bootph-all-v3-2-9bc2eccb6952@ti.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add bootph-all property for J7 boards | expand |
On 7/30/2024 3:23 PM, Manorit Chawdhry wrote: > Removes bootph-* properties from parent nodes and aligns the bootph-* to > other u-boot.dtsi > > Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> > --- > arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 9 +-------- > arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 8 ++++---- > 2 files changed, 5 insertions(+), 12 deletions(-) > > diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts > index ffa38f41679d..311844490027 100644 > --- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts > +++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts > @@ -461,7 +461,6 @@ J784S4_IOPAD(0x078, PIN_OUTPUT, 1) /* (AH37) MCAN2_RX.AUDIO_EXT_REFCLK1 */ > }; > main_pmx0 has bootph-all in parent node, please consider to clean that as well > &wkup_pmx2 { > - bootph-all; > wkup_uart0_pins_default: wkup-uart0-default-pins { > bootph-all; > pinctrl-single,pins = < > @@ -577,7 +576,6 @@ J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 7) > }; > > &wkup_pmx0 { > - bootph-all; > mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins { > bootph-all; > pinctrl-single,pins = < > @@ -597,7 +595,6 @@ J784S4_WKUP_IOPAD(0x008, PIN_INPUT, 0) /* (C34) MCU_OSPI0_DQS */ > }; > > &wkup_pmx1 { > - bootph-all; > mcu_fss0_ospi0_1_pins_default: mcu-fss0-ospi0-1-default-pins { > bootph-all; > pinctrl-single,pins = < > @@ -668,6 +665,7 @@ bucka12: buck12 { > regulator-max-microvolt = <1100000>; > regulator-boot-on; > regulator-always-on; > + bootph-pre-ram; > }; > > bucka3: buck3 { > @@ -769,18 +767,15 @@ &ufs_wrapper { > }; > > &fss { > - bootph-all; > status = "okay"; > }; > > &ospi0 { > - bootph-all; > status = "okay"; > pinctrl-names = "default"; > pinctrl-0 = <&mcu_fss0_ospi0_pins_default>, <&mcu_fss0_ospi0_1_pins_default>; > > flash@0 { > - bootph-all; > compatible = "jedec,spi-nor"; > reg = <0x0>; > spi-tx-bus-width = <8>; > @@ -837,13 +832,11 @@ partition@3fc0000 { > }; > > &ospi1 { > - bootph-all; > status = "okay"; > pinctrl-names = "default"; > pinctrl-0 = <&mcu_fss0_ospi1_pins_default>; > > flash@0 { > - bootph-all; > compatible = "jedec,spi-nor"; > reg = <0x0>; > spi-tx-bus-width = <1>; > diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi > index f3a6ed1c979d..3f89277e3c2c 100644 > --- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi > @@ -7,7 +7,6 @@ > > &cbass_mcu_wakeup { > sms: system-controller@44083000 { > - bootph-all; > compatible = "ti,k2g-sci"; > ti,host-id = <12>; > > @@ -39,7 +38,6 @@ k3_reset: reset-controller { > }; > > wkup_conf: bus@43000000 { > - bootph-all; > compatible = "simple-bus"; > #address-cells = <1>; > #size-cells = <1>; > @@ -65,6 +63,7 @@ secure_proxy_sa3: mailbox@43600000 { > * firmware on non-MPU processors > */ > status = "disabled"; > + bootph-pre-ram; > }; > > mcu_ram: sram@41c00000 { > @@ -175,10 +174,10 @@ mcu_timer0: timer@40400000 { > ti,timer-pwm; > /* Non-MPU Firmware usage */ > status = "reserved"; > + bootph-all; both nodes mcu_timer0 and mcu_timer1 as marked as /* Non-MPU Firmware usage */, Please provide some message added bootph in first and removed from second > }; > > mcu_timer1: timer@40410000 { > - bootph-all; > compatible = "ti,am654-timer"; > reg = <0x00 0x40410000 0x00 0x400>; > interrupts = <GIC_SPI 817 IRQ_TYPE_LEVEL_HIGH>; > @@ -458,7 +457,6 @@ mcu_spi2: spi@40320000 { > }; > [..]
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts index ffa38f41679d..311844490027 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts @@ -461,7 +461,6 @@ J784S4_IOPAD(0x078, PIN_OUTPUT, 1) /* (AH37) MCAN2_RX.AUDIO_EXT_REFCLK1 */ }; &wkup_pmx2 { - bootph-all; wkup_uart0_pins_default: wkup-uart0-default-pins { bootph-all; pinctrl-single,pins = < @@ -577,7 +576,6 @@ J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 7) }; &wkup_pmx0 { - bootph-all; mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins { bootph-all; pinctrl-single,pins = < @@ -597,7 +595,6 @@ J784S4_WKUP_IOPAD(0x008, PIN_INPUT, 0) /* (C34) MCU_OSPI0_DQS */ }; &wkup_pmx1 { - bootph-all; mcu_fss0_ospi0_1_pins_default: mcu-fss0-ospi0-1-default-pins { bootph-all; pinctrl-single,pins = < @@ -668,6 +665,7 @@ bucka12: buck12 { regulator-max-microvolt = <1100000>; regulator-boot-on; regulator-always-on; + bootph-pre-ram; }; bucka3: buck3 { @@ -769,18 +767,15 @@ &ufs_wrapper { }; &fss { - bootph-all; status = "okay"; }; &ospi0 { - bootph-all; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&mcu_fss0_ospi0_pins_default>, <&mcu_fss0_ospi0_1_pins_default>; flash@0 { - bootph-all; compatible = "jedec,spi-nor"; reg = <0x0>; spi-tx-bus-width = <8>; @@ -837,13 +832,11 @@ partition@3fc0000 { }; &ospi1 { - bootph-all; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&mcu_fss0_ospi1_pins_default>; flash@0 { - bootph-all; compatible = "jedec,spi-nor"; reg = <0x0>; spi-tx-bus-width = <1>; diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi index f3a6ed1c979d..3f89277e3c2c 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi @@ -7,7 +7,6 @@ &cbass_mcu_wakeup { sms: system-controller@44083000 { - bootph-all; compatible = "ti,k2g-sci"; ti,host-id = <12>; @@ -39,7 +38,6 @@ k3_reset: reset-controller { }; wkup_conf: bus@43000000 { - bootph-all; compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; @@ -65,6 +63,7 @@ secure_proxy_sa3: mailbox@43600000 { * firmware on non-MPU processors */ status = "disabled"; + bootph-pre-ram; }; mcu_ram: sram@41c00000 { @@ -175,10 +174,10 @@ mcu_timer0: timer@40400000 { ti,timer-pwm; /* Non-MPU Firmware usage */ status = "reserved"; + bootph-all; }; mcu_timer1: timer@40410000 { - bootph-all; compatible = "ti,am654-timer"; reg = <0x00 0x40410000 0x00 0x400>; interrupts = <GIC_SPI 817 IRQ_TYPE_LEVEL_HIGH>; @@ -458,7 +457,6 @@ mcu_spi2: spi@40320000 { }; mcu_navss: bus@28380000 { - bootph-all; compatible = "simple-bus"; #address-cells = <2>; #size-cells = <2>; @@ -521,6 +519,7 @@ secure_proxy_mcu: mailbox@2a480000 { * firmware on non-MPU processors */ status = "disabled"; + bootph-pre-ram; }; mcu_cpsw: ethernet@46000000 { @@ -632,6 +631,7 @@ wkup_vtm0: temperature-sensor@42040000 { <0x00 0x42050000 0x00 0x350>; power-domains = <&k3_pds 243 TI_SCI_PD_SHARED>; #thermal-sensor-cells = <1>; + bootph-pre-ram; }; tscadc0: tscadc@40200000 {
Removes bootph-* properties from parent nodes and aligns the bootph-* to other u-boot.dtsi Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> --- arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 9 +-------- arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 8 ++++---- 2 files changed, 5 insertions(+), 12 deletions(-)