| Message ID | 20240808120936.3299937-5-ayan.kumar.halder@amd.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | xen: arm: Split MMU code in preparation for MPU work (part 2) | expand |
Hi Ayan, On 08/08/2024 14:09, Ayan Kumar Halder wrote: > All the EL2 MMU specific registers are enclosed within CONFIG_MMU. > > Signed-off-by: Ayan Kumar Halder <ayan.kumar.halder@amd.com> > --- > Changes from v1 :- > 1. 'vttbr_el2' field is enclosed with ifdef. > 2. No movement of code. > > xen/arch/arm/traps.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c > index aac6c599f8..f51e1424cb 100644 > --- a/xen/arch/arm/traps.c > +++ b/xen/arch/arm/traps.c > @@ -720,8 +720,10 @@ struct reg_ctxt { > uint32_t ifsr32_el2; > #endif > > +#ifdef CONFIG_MMU > /* Hypervisor-side state */ > uint64_t vttbr_el2; Given that you protected the field here, why did you leave assignments in show_registers() and vcpu_show_registers() unguarded? ~Michal
On 09/08/2024 13:15, Michal Orzel wrote: > Hi Ayan, Hi Michal, > > On 08/08/2024 14:09, Ayan Kumar Halder wrote: >> All the EL2 MMU specific registers are enclosed within CONFIG_MMU. >> >> Signed-off-by: Ayan Kumar Halder <ayan.kumar.halder@amd.com> >> --- >> Changes from v1 :- >> 1. 'vttbr_el2' field is enclosed with ifdef. >> 2. No movement of code. >> >> xen/arch/arm/traps.c | 6 ++++++ >> 1 file changed, 6 insertions(+) >> >> diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c >> index aac6c599f8..f51e1424cb 100644 >> --- a/xen/arch/arm/traps.c >> +++ b/xen/arch/arm/traps.c >> @@ -720,8 +720,10 @@ struct reg_ctxt { >> uint32_t ifsr32_el2; >> #endif >> >> +#ifdef CONFIG_MMU >> /* Hypervisor-side state */ >> uint64_t vttbr_el2; > Given that you protected the field here, why did you leave assignments in show_registers() > and vcpu_show_registers() unguarded? Makes sense. Sorry I forgot about that. - Ayan
diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c index aac6c599f8..f51e1424cb 100644 --- a/xen/arch/arm/traps.c +++ b/xen/arch/arm/traps.c @@ -720,8 +720,10 @@ struct reg_ctxt { uint32_t ifsr32_el2; #endif +#ifdef CONFIG_MMU /* Hypervisor-side state */ uint64_t vttbr_el2; +#endif }; static const char *mode_string(register_t cpsr) @@ -919,12 +921,16 @@ static void _show_registers(const struct cpu_user_regs *regs, #endif } printk(" VTCR_EL2: %"PRIregister"\n", READ_SYSREG(VTCR_EL2)); +#ifdef CONFIG_MMU printk(" VTTBR_EL2: %016"PRIx64"\n", ctxt->vttbr_el2); +#endif printk("\n"); printk(" SCTLR_EL2: %"PRIregister"\n", READ_SYSREG(SCTLR_EL2)); printk(" HCR_EL2: %"PRIregister"\n", READ_SYSREG(HCR_EL2)); +#ifdef CONFIG_MMU printk(" TTBR0_EL2: %016"PRIx64"\n", READ_SYSREG64(TTBR0_EL2)); +#endif printk("\n"); printk(" ESR_EL2: %"PRIregister"\n", regs->hsr); printk(" HPFAR_EL2: %"PRIregister"\n", READ_SYSREG(HPFAR_EL2));
All the EL2 MMU specific registers are enclosed within CONFIG_MMU. Signed-off-by: Ayan Kumar Halder <ayan.kumar.halder@amd.com> --- Changes from v1 :- 1. 'vttbr_el2' field is enclosed with ifdef. 2. No movement of code. xen/arch/arm/traps.c | 6 ++++++ 1 file changed, 6 insertions(+)