new file mode 100644
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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/nuvoton,ma35d1-nand.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nuvoton MA35D1 NAND Flash Interface (NFI) Controller
+
+allOf:
+ - $ref: nand-controller.yaml#
+
+maintainers:
+ - Hui-Ping Chen <hpchen0nvt@gmail.com>
+
+properties:
+ compatible:
+ enum:
+ - nuvoton,ma35d1-nand
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ minItems: 1
+
+patternProperties:
+ "^nand@[a-f0-9]$":
+ type: object
+ $ref: raw-nand-chip.yaml
+ properties:
+ nand-ecc-mode:
+ const: hw
+
+ nand-ecc-step-size:
+ enum: [512, 1024]
+
+ nand-ecc-strength:
+ enum: [8, 12, 24]
+
+ nand-bus-width:
+ const: 8
+
+ unevaluatedProperties: false
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ nand-controller@401A0000 {
+ compatible = "nuvoton,ma35d1-nand";
+ reg = <0x0 0x401A0000 0x0 0x1000>;
+ interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk NAND_GATE>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ nand@0 {
+ reg = <0>;
+
+ nand-on-flash-bbt;
+ nand-ecc-mode = "hw";
+ nand-ecc-step-size = <512>;
+ nand-ecc-strength = <8>;
+ nand-bus-width = <8>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ uboot@0 {
+ label = "nand-uboot";
+ read-only;
+ reg = <0x0 0x300000>;
+ };
+ };
+ };
+ };
+ };
+
+...
Add dt-bindings for the Nuvoton MA35 SoC NAND Controller. Signed-off-by: Hui-Ping Chen <hpchen0nvt@gmail.com> --- .../bindings/mtd/nuvoton,ma35d1-nand.yaml | 97 +++++++++++++++++++ 1 file changed, 97 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/nuvoton,ma35d1-nand.yaml