Message ID | 20240731060959.897105-1-alexander.stein@ew.tq-group.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [v2,1/1] arm64: dts: imx8-ss-dma: enable dma support for lpspi | expand |
> Subject: [PATCH v2 1/1] arm64: dts: imx8-ss-dma: enable dma support > for lpspi > > From: Clark Wang <xiaoning.wang@nxp.com> > > Add DMA configurations for LPSPI nodes on i.MX8QX/QM/DXL. > > Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> > Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
On Wed, Jul 31, 2024 at 08:09:58AM +0200, Alexander Stein wrote: > From: Clark Wang <xiaoning.wang@nxp.com> > > Add DMA configurations for LPSPI nodes on i.MX8QX/QM/DXL. > > Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> > Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Applied, thanks!
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi index 1ee9496c988c5..575be8115e427 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi @@ -34,6 +34,8 @@ lpspi0: spi@5a000000 { assigned-clocks = <&clk IMX_SC_R_SPI_0 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <60000000>; power-domains = <&pd IMX_SC_R_SPI_0>; + dmas = <&edma2 1 0 0>, <&edma2 0 0 FSL_EDMA_RX>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -50,6 +52,8 @@ lpspi1: spi@5a010000 { assigned-clocks = <&clk IMX_SC_R_SPI_1 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <60000000>; power-domains = <&pd IMX_SC_R_SPI_1>; + dmas = <&edma2 3 0 0>, <&edma2 2 0 FSL_EDMA_RX>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -66,6 +70,8 @@ lpspi2: spi@5a020000 { assigned-clocks = <&clk IMX_SC_R_SPI_2 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <60000000>; power-domains = <&pd IMX_SC_R_SPI_2>; + dmas = <&edma2 5 0 0>, <&edma2 4 0 FSL_EDMA_RX>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -82,6 +88,8 @@ lpspi3: spi@5a030000 { assigned-clocks = <&clk IMX_SC_R_SPI_3 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <60000000>; power-domains = <&pd IMX_SC_R_SPI_3>; + dmas = <&edma2 7 0 0>, <&edma2 6 0 FSL_EDMA_RX>; + dma-names = "tx", "rx"; status = "disabled"; };