| Message ID | d2beb15377dc8b580ca5557b1a4a6f50b74055aa.1722355365.git.daniel@makrotopia.org (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | hwrng: add hwrng support for Rockchip RK3568 | expand |
On Tue, Jul 30, 2024 at 10:11 AM Daniel Golle <daniel@makrotopia.org> wrote: > > From: Aurelien Jarno <aurelien@aurel32.net> > > Include the just added Rockchip RNG driver for RK356x SoCs and > enable it on RK3568. > > Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> > Signed-off-by: Daniel Golle <daniel@makrotopia.org> > --- > arch/arm64/boot/dts/rockchip/rk3568.dtsi | 4 ++++ > arch/arm64/boot/dts/rockchip/rk356x.dtsi | 10 ++++++++++ > 2 files changed, 14 insertions(+) > > diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi > index f1be76a54ceb0..2a6ca20e607fd 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi > @@ -257,6 +257,10 @@ power-domain@RK3568_PD_PIPE { > }; > }; > > +&rng { > + status = "okay"; > +}; > + > &usb_host0_xhci { > phys = <&usb2phy0_otg>, <&combphy0 PHY_TYPE_USB3>; > phy-names = "usb2-phy", "usb3-phy"; > diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi > index 4690be841a1cd..d160a23fd4959 100644 > --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi > @@ -1113,6 +1113,16 @@ sdhci: mmc@fe310000 { > status = "disabled"; > }; > > + rng: rng@fe388000 { > + compatible = "rockchip,rk3568-rng"; > + reg = <0x0 0xfe388000 0x0 0x4000>; > + clocks = <&cru CLK_TRNG_NS>, <&cru HCLK_TRNG_NS>; > + clock-names = "core", "ahb"; > + resets = <&cru SRST_TRNG_NS>; > + reset-names = "reset"; This adds a new warning: rng@fe388000: 'reset-names' does not match any of the regexes: 'pinctrl-[0-9]+'
Am Dienstag, 13. August 2024, 16:17:05 CEST schrieb Rob Herring: > On Tue, Jul 30, 2024 at 10:11 AM Daniel Golle <daniel@makrotopia.org> wrote: > > > > From: Aurelien Jarno <aurelien@aurel32.net> > > > > Include the just added Rockchip RNG driver for RK356x SoCs and > > enable it on RK3568. > > > > Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> > > Signed-off-by: Daniel Golle <daniel@makrotopia.org> > > --- > > arch/arm64/boot/dts/rockchip/rk3568.dtsi | 4 ++++ > > arch/arm64/boot/dts/rockchip/rk356x.dtsi | 10 ++++++++++ > > 2 files changed, 14 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi > > index f1be76a54ceb0..2a6ca20e607fd 100644 > > --- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi > > +++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi > > @@ -257,6 +257,10 @@ power-domain@RK3568_PD_PIPE { > > }; > > }; > > > > +&rng { > > + status = "okay"; > > +}; > > + > > &usb_host0_xhci { > > phys = <&usb2phy0_otg>, <&combphy0 PHY_TYPE_USB3>; > > phy-names = "usb2-phy", "usb3-phy"; > > diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi > > index 4690be841a1cd..d160a23fd4959 100644 > > --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi > > +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi > > @@ -1113,6 +1113,16 @@ sdhci: mmc@fe310000 { > > status = "disabled"; > > }; > > > > + rng: rng@fe388000 { > > + compatible = "rockchip,rk3568-rng"; > > + reg = <0x0 0xfe388000 0x0 0x4000>; > > + clocks = <&cru CLK_TRNG_NS>, <&cru HCLK_TRNG_NS>; > > + clock-names = "core", "ahb"; > > + resets = <&cru SRST_TRNG_NS>; > > + reset-names = "reset"; > > This adds a new warning: > > rng@fe388000: 'reset-names' does not match any of the regexes: 'pinctrl-[0-9]+' I've created and sent a patch to remove the reset-names now.
diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi index f1be76a54ceb0..2a6ca20e607fd 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi @@ -257,6 +257,10 @@ power-domain@RK3568_PD_PIPE { }; }; +&rng { + status = "okay"; +}; + &usb_host0_xhci { phys = <&usb2phy0_otg>, <&combphy0 PHY_TYPE_USB3>; phy-names = "usb2-phy", "usb3-phy"; diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index 4690be841a1cd..d160a23fd4959 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -1113,6 +1113,16 @@ sdhci: mmc@fe310000 { status = "disabled"; }; + rng: rng@fe388000 { + compatible = "rockchip,rk3568-rng"; + reg = <0x0 0xfe388000 0x0 0x4000>; + clocks = <&cru CLK_TRNG_NS>, <&cru HCLK_TRNG_NS>; + clock-names = "core", "ahb"; + resets = <&cru SRST_TRNG_NS>; + reset-names = "reset"; + status = "disabled"; + }; + i2s0_8ch: i2s@fe400000 { compatible = "rockchip,rk3568-i2s-tdm"; reg = <0x0 0xfe400000 0x0 0x1000>;