| Message ID | 20240821-friendlyelec-nanopc-t6-lts-v2-1-e0138bb10042@linaro.org (mailing list archive) |
|---|---|
| State | Superseded, archived |
| Headers | show |
| Series | improve FriendlyELEC NanoPC-T6 a bit | expand |
Am Mittwoch, 21. August 2024, 10:25:30 CEST schrieb Marcin Juszkiewicz: > FriendlyELEC introduced new version of NanoPC-T6 SBC. If this change is specific to the new "LTS" board variant, why is it in the main board dts now? I.e. with this change you enable it on _all_ NanoPC-T6 boards, even the ones without those components? Heiko > MiniPCIe slot got removed and USB 2.0 configuration has changed. > There are two external accessible ports and two ports on internal > header. > > There is on-board USB hub which provides: > - one external connector (bottom one) > - two internal ports on pin header > - m.2 E port > > Top USB 2.0 connector comes directly from SoC. > > Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> > --- > arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts | 35 +++++++++++++++++++++++ > 1 file changed, 35 insertions(+) > > diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts > index ad8e36a339dc..bf2c4427ad74 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts > +++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts > @@ -182,6 +182,20 @@ vdd_4g_3v3: vdd-4g-3v3-regulator { > regulator-max-microvolt = <3300000>; > vin-supply = <&vcc5v0_sys>; > }; > + > + vcc5v0_usb20_host: vcc5v0-usb20-host-regulator { > + compatible = "regulator-fixed"; > + enable-active-high; > + gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; > + pinctrl-0 = <&usb20_host_pwren>; > + pinctrl-names = "default"; > + regulator-always-on; > + regulator-boot-on; > + regulator-max-microvolt = <5000000>; > + regulator-min-microvolt = <5000000>; > + regulator-name = "vcc5v0_usb20_host"; > + vin-supply = <&vcc5v0_sys>; > + }; > }; > > &combphy0_ps { > @@ -535,6 +549,10 @@ typec5v_pwren: typec5v-pwren { > rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; > }; > > + usb20_host_pwren: usb20-host-pwren { > + rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + > usbc0_int: usbc0-int { > rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; > }; > @@ -911,6 +929,14 @@ &uart2 { > status = "okay"; > }; > > +&u2phy1 { > + status = "okay"; > +}; > + > +&u2phy1_otg { > + status = "okay"; > +}; > + > &u2phy2_host { > phy-supply = <&vdd_4g_3v3>; > status = "okay"; > @@ -928,6 +954,10 @@ &u2phy3 { > status = "okay"; > }; > > +&usbdp_phy1 { > + status = "okay"; > +}; > + > &usb_host0_ehci { > status = "okay"; > }; > @@ -943,3 +973,8 @@ &usb_host1_ehci { > &usb_host1_ohci { > status = "okay"; > }; > + > +&usb_host1_xhci { > + dr_mode = "host"; > + status = "okay"; > +}; > >
On 21.08.2024 10:58, Heiko Stübner wrote: > Am Mittwoch, 21. August 2024, 10:25:30 CEST schrieb Marcin Juszkiewicz: >> FriendlyELEC introduced new version of NanoPC-T6 SBC. > > If this change is specific to the new "LTS" board variant, why is it in > the main board dts now? I have not seen firmware builds which handle 'is it LTS or not' version of board. > I.e. with this change you enable it on _all_ NanoPC-T6 boards, even the > ones without those components? The non-LTS version has usb20_host_pwren line not connected. So enabling it does not affect the board. Similar to 4g_lte_pwren line which is present on NanoPC-T6 non-LTS and not connected on LTS one. Looks like vendor took care to keep both versions of board to work with one DT.
Hello Marcin, On 2024-08-21 11:14, Marcin Juszkiewicz wrote: > On 21.08.2024 10:58, Heiko Stübner wrote: >> Am Mittwoch, 21. August 2024, 10:25:30 CEST schrieb Marcin >> Juszkiewicz: >>> FriendlyELEC introduced new version of NanoPC-T6 SBC. >> >> If this change is specific to the new "LTS" board variant, why is it >> in >> the main board dts now? > > I have not seen firmware builds which handle 'is it LTS or not' > version of board. > >> I.e. with this change you enable it on _all_ NanoPC-T6 boards, even >> the >> ones without those components? > > The non-LTS version has usb20_host_pwren line not connected. So > enabling it does not affect the board. Similar to 4g_lte_pwren line > which is present on NanoPC-T6 non-LTS and not connected on LTS one. > > Looks like vendor took care to keep both versions of board to work with > one DT. I'd suggest that you introduce a new board dts file, specific to the LTS version of this board. The DT describes actual hardware, so it should be as strict and as specific as possible.
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts index ad8e36a339dc..bf2c4427ad74 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts @@ -182,6 +182,20 @@ vdd_4g_3v3: vdd-4g-3v3-regulator { regulator-max-microvolt = <3300000>; vin-supply = <&vcc5v0_sys>; }; + + vcc5v0_usb20_host: vcc5v0-usb20-host-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&usb20_host_pwren>; + pinctrl-names = "default"; + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <5000000>; + regulator-name = "vcc5v0_usb20_host"; + vin-supply = <&vcc5v0_sys>; + }; }; &combphy0_ps { @@ -535,6 +549,10 @@ typec5v_pwren: typec5v-pwren { rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; }; + usb20_host_pwren: usb20-host-pwren { + rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + usbc0_int: usbc0-int { rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; }; @@ -911,6 +929,14 @@ &uart2 { status = "okay"; }; +&u2phy1 { + status = "okay"; +}; + +&u2phy1_otg { + status = "okay"; +}; + &u2phy2_host { phy-supply = <&vdd_4g_3v3>; status = "okay"; @@ -928,6 +954,10 @@ &u2phy3 { status = "okay"; }; +&usbdp_phy1 { + status = "okay"; +}; + &usb_host0_ehci { status = "okay"; }; @@ -943,3 +973,8 @@ &usb_host1_ehci { &usb_host1_ohci { status = "okay"; }; + +&usb_host1_xhci { + dr_mode = "host"; + status = "okay"; +};
FriendlyELEC introduced new version of NanoPC-T6 SBC. MiniPCIe slot got removed and USB 2.0 configuration has changed. There are two external accessible ports and two ports on internal header. There is on-board USB hub which provides: - one external connector (bottom one) - two internal ports on pin header - m.2 E port Top USB 2.0 connector comes directly from SoC. Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> --- arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts | 35 +++++++++++++++++++++++ 1 file changed, 35 insertions(+)