| Message ID | 20240821-friendlyelec-nanopc-t6-lts-v2-3-e0138bb10042@linaro.org (mailing list archive) |
|---|---|
| State | Superseded, archived |
| Headers | show |
| Series | improve FriendlyELEC NanoPC-T6 a bit | expand |
Am Mittwoch, 21. August 2024, 10:25:32 CEST schrieb Marcin Juszkiewicz: > FriendlyELEC NanoPC-T6 LTS has 32MB of SPI flash on-board. On non-LTS > boards this is optional chip. > > Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> > --- > arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts > index bf2c4427ad74..0f9df64dc1b1 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts > +++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts > @@ -594,6 +594,20 @@ &sdmmc { > status = "okay"; > }; > > +&sfc { > + pinctrl-names = "default"; > + pinctrl-0 = <&fspim1_pins>; > + status = "okay"; > + > + flash@0 { > + compatible = "jedec,spi-nor"; > + reg = <0>; > + spi-max-frequency = <104000000>; > + spi-rx-bus-width = <4>; > + spi-tx-bus-width = <1>; > + }; > +}; > + same question as patch1. You enable this also on the non-LTS boards now that don't have this flash chip?
On 21.08.2024 10:59, Heiko Stübner wrote: > Am Mittwoch, 21. August 2024, 10:25:32 CEST schrieb Marcin Juszkiewicz: >> FriendlyELEC NanoPC-T6 LTS has 32MB of SPI flash on-board. On non-LTS >> boards this is optional chip. >> >> Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> >> --- >> arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts | 14 ++++++++++++++ >> 1 file changed, 14 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts >> index bf2c4427ad74..0f9df64dc1b1 100644 >> --- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts >> +++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts >> @@ -594,6 +594,20 @@ &sdmmc { >> status = "okay"; >> }; >> >> +&sfc { >> + pinctrl-names = "default"; >> + pinctrl-0 = <&fspim1_pins>; >> + status = "okay"; >> + >> + flash@0 { >> + compatible = "jedec,spi-nor"; >> + reg = <0>; >> + spi-max-frequency = <104000000>; >> + spi-rx-bus-width = <4>; >> + spi-tx-bus-width = <1>; >> + }; >> +}; >> + > > same question as patch1. You enable this also on the non-LTS boards now > that don't have this flash chip? non-LTS version of board has a space for this SPI chip so it can be populated either by vendor or by user. Any OS/firmware which touch SPI flash should (IMHO) check is chip present - DT tells where to look.
On 2024-08-21 11:17, Marcin Juszkiewicz wrote: > On 21.08.2024 10:59, Heiko Stübner wrote: >> Am Mittwoch, 21. August 2024, 10:25:32 CEST schrieb Marcin >> Juszkiewicz: >>> FriendlyELEC NanoPC-T6 LTS has 32MB of SPI flash on-board. On non-LTS >>> boards this is optional chip. >>> >>> Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> >>> --- >>> arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts | 14 >>> ++++++++++++++ >>> 1 file changed, 14 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts >>> b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts >>> index bf2c4427ad74..0f9df64dc1b1 100644 >>> --- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts >>> +++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts >>> @@ -594,6 +594,20 @@ &sdmmc { >>> status = "okay"; >>> }; >>> +&sfc { >>> + pinctrl-names = "default"; >>> + pinctrl-0 = <&fspim1_pins>; >>> + status = "okay"; >>> + >>> + flash@0 { >>> + compatible = "jedec,spi-nor"; >>> + reg = <0>; >>> + spi-max-frequency = <104000000>; >>> + spi-rx-bus-width = <4>; >>> + spi-tx-bus-width = <1>; >>> + }; >>> +}; >>> + >> >> same question as patch1. You enable this also on the non-LTS boards >> now >> that don't have this flash chip? > > non-LTS version of board has a space for this SPI chip so it can be > populated either by vendor or by user. Any OS/firmware which touch SPI > flash should (IMHO) check is chip present - DT tells where to look. Ah, so it's like the Pine64 Rock64, for example, [1] which also comes with unpopulated pads for the SPI chip. In that case, I'd agree that adding the definitions to the non-LTS DT is fine. [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts?h=v6.11-rc4#n338
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts index bf2c4427ad74..0f9df64dc1b1 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts @@ -594,6 +594,20 @@ &sdmmc { status = "okay"; }; +&sfc { + pinctrl-names = "default"; + pinctrl-0 = <&fspim1_pins>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <104000000>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <1>; + }; +}; + &spi2 { status = "okay"; assigned-clocks = <&cru CLK_SPI2>;
FriendlyELEC NanoPC-T6 LTS has 32MB of SPI flash on-board. On non-LTS boards this is optional chip. Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> --- arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts | 14 ++++++++++++++ 1 file changed, 14 insertions(+)