| Message ID | 20240821135817.56393-1-tarang.raval@siliconsignals.io (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2] arm64: dts: imx8mm-emtop-baseboard: Add Peripherals Support | expand |
Hi Tarang, On Wed, Aug 21, 2024 at 10:58 AM Tarang Raval <tarang.raval@siliconsignals.io> wrote: > + can-control { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_cancontrol>; > + reset-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>; > + }; This does not have any compatible string, so this can-control block should be removed. > + can: can@0 { > + compatible = "microchip,mcp2515"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_canbus>; > + reg = <0>; reg should come right after compatible. > + rtc@32 { > + compatible = "rx8025"; This gives a warning as rx8025 does not exist. It should be "epson,rx8025" instead. > +/* Wifi */ > +&usdhc1 { > + pinctrl-names = "default", "state_100mhz", "state_200mhz"; > + pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>; > + pinctrl-1 = <&pinctrl_usdhc1_100mhz>, <&pinctrl_usdhc1_gpio>; > + pinctrl-2 = <&pinctrl_usdhc1_200mhz>, <&pinctrl_usdhc1_gpio>; pinctrl_usdhc1_gpio is not being used as you only pass pinctrl-names = "default". Remove pinctrl_usdhc1_gpio. > +/* SD-card */ > +&usdhc2 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; > + pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; > + pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; pinctrl_usdhc2_gpio is not being used as you only pass pinctrl-names = "default". Remove pinctrl_usdhc2_gpio. > + cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; > + bus-width = <4>; > + status = "okay"; > +}; > + > &iomuxc { > + > + pinctrl_canbus: canbusgrp { > + fsl,pins = < > + MX8MM_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x14 > + >; > + }; Please add blank lines to separate the pinctrl groups. > + pinctrl_cancontrol: cancontrolgrp {
On 21.08.2024 19:28:17, Tarang Raval wrote: > Add following peripherals support for the Emtop i.MX8M Mini Baseboard > > * Wi-Fi > * Audio > * SD card > * RTC > * CAN bus > * USB OTG > > Signed-off-by: Tarang Raval <tarang.raval@siliconsignals.io> > --- > > Changes in v2: > > 1. Updated the node name and pinctrl name > 2. Removed the 'regulators' container > 3. Removed a stray blank line > 4. Removed non-existent properties > 5. Removed unused node and pinctrl > - modem-reset > - pinctrl_uart1 > 6. Defined the CAN transceiver reset GPIO separately > --- > .../dts/freescale/imx8mm-emtop-baseboard.dts | 323 ++++++++++++++++++ > 1 file changed, 323 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-emtop-baseboard.dts b/arch/arm64/boot/dts/freescale/imx8mm-emtop-baseboard.dts > index 7d2cb74c64ee..322338e626ce 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mm-emtop-baseboard.dts > +++ b/arch/arm64/boot/dts/freescale/imx8mm-emtop-baseboard.dts > @@ -11,6 +11,113 @@ / { [...] > + can-control { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_cancontrol>; > + reset-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>; I don't see a compatible here. [...] > +/* CAN BUS */ > +&ecspi2 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_ecspi2>; > + status = "okay"; > + > + can: can@0 { > + compatible = "microchip,mcp2515"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_canbus>; > + reg = <0>; > + clocks = <&osc_can>; > + interrupt-parent = <&gpio1>; > + interrupts = <14 IRQ_TYPE_EDGE_FALLING>; Don't use edge triggered interrupts, use level triggered ones. > + spi-max-frequency = <10000000>; > + }; > }; regards, Marc
Hi, Am Mittwoch, 21. August 2024, 15:58:17 CEST schrieb Tarang Raval: > Add following peripherals support for the Emtop i.MX8M Mini Baseboard > > * Wi-Fi > * Audio > * SD card > * RTC > * CAN bus > * USB OTG > > Signed-off-by: Tarang Raval <tarang.raval@siliconsignals.io> > --- > > Changes in v2: > > 1. Updated the node name and pinctrl name > 2. Removed the 'regulators' container > 3. Removed a stray blank line > 4. Removed non-existent properties > 5. Removed unused node and pinctrl > - modem-reset > - pinctrl_uart1 > 6. Defined the CAN transceiver reset GPIO separately > --- > .../dts/freescale/imx8mm-emtop-baseboard.dts | 323 ++++++++++++++++++ > 1 file changed, 323 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-emtop-baseboard.dts b/arch/arm64/boot/dts/freescale/imx8mm-emtop-baseboard.dts > index 7d2cb74c64ee..322338e626ce 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mm-emtop-baseboard.dts > +++ b/arch/arm64/boot/dts/freescale/imx8mm-emtop-baseboard.dts > @@ -11,6 +11,113 @@ / { > model = "Emtop Embedded Solutions i.MX8M Mini Baseboard V1"; > compatible = "ees,imx8mm-emtop-baseboard", "ees,imx8mm-emtop-som", > "fsl,imx8mm"; > + > + extcon_usb: extcon-usbotg1 { > + compatible = "linux,extcon-usb-gpio"; Please refer to Documentation/devicetree/bindings/extcon/extcon-usb-gpio.yaml: > Deprecated, use USB connector node instead. > > deprecated: true Switch to connectors instead. > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_extcon_usb>; > + id-gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>; > + enable-gpio = <&gpio1 12 GPIO_ACTIVE_LOW>; Use id-gpios and enable-gpios. > + }; > + Best regards, Alexander
Hey Tarang Raval, let's continue discussing things on the mailing list. On 22.08.2024 06:42:49, Tarang Raval wrote: > Thank you for the feedback. I noticed that some mainline DTS files, > including the current upstream DTS, use edge-triggered interrupts. I was talking about the mcp2515 CAN chip connected to SPI only. Can you point me to the upstream DTS? > Could you please help me understand the reasoning behind the > preference for level-triggered interrupts over edge-triggered ones If an edge interrupt occurs while the driver is in the ISR, it may lose this interrupt. The driver will not process the pending interrupt and CAN communication will get stuck. regards, Marc
Hi Marc, The CAN chip on the Kontron i.MX8M Mini Baseboard is the MCP2515, the same as ours, and they also use edge triggering. You can see the patch in the link below link : https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=8668d8b2e67fe7cf65f02becd5d67c0636689e82 Best regards, Tarang
On 22.08.2024 11:42:07, Tarang Raval wrote: > The CAN chip on the Kontron i.MX8M Mini Baseboard is the MCP2515, the > same as ours, and they also use edge triggering. You can see the patch > in the link below > > link : https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=8668d8b2e67fe7cf65f02becd5d67c0636689e82 That's also not optimal. Better, use a level triggered IRQ instead. regards, Mac
Hi alexander, Thank you for your feedback, Regarding your suggestion to switch to the USB connector node >> + extcon_usb: extcon-usbotg1 { >> + compatible = "linux,extcon-usb-gpio"; > >Please refer to Documentation/devicetree/bindings/extcon/extcon-usb-gpio.yaml: I couldn’t find the Documentation/devicetree/bindings/extcon/extcon-usb-gpio.yaml file as mentioned. Instead, I located the extcon-usb-gpio.txt file, but it doesn’t contain documentation about connectors. >> Deprecated, use USB connector node instead. >> >> deprecated: true > >Switch to connectors instead. I referred to the following YAML file: link : https://www.kernel.org/doc/Documentation/devicetree/bindings/connector/usb-connector.yaml Could you please confirm if this is the correct file to refer to? Best regards, Tarang
Hi, Am Freitag, 23. August 2024, 06:42:24 CEST schrieb Tarang Raval: > Hi alexander, > > Thank you for your feedback, Regarding your suggestion to switch to the USB connector node > > >> + extcon_usb: extcon-usbotg1 { > >> + compatible = "linux,extcon-usb-gpio"; > > > >Please refer to Documentation/devicetree/bindings/extcon/extcon-usb-gpio.yaml: > > I couldn’t find the Documentation/devicetree/bindings/extcon/extcon-usb-gpio.yaml file as mentioned. Instead, I located the extcon-usb-gpio.txt file, but it doesn’t contain documentation about connectors. Sorry, I thought my patch [1] was already applied. Meanwhile another one is applied instead [2]. [1] https://lore.kernel.org/all/20240215093214.796821-2-alexander.stein@ew.tq-group.com/ [2] https://lore.kernel.org/all/b4b96be5-fad6-458c-a236-9b6761eac968@kernel.org/ > >> Deprecated, use USB connector node instead. > >> > >> deprecated: true > > > >Switch to connectors instead. > > I referred to the following YAML file: > > link : https://www.kernel.org/doc/Documentation/devicetree/bindings/connector/usb-connector.yaml > > Could you please confirm if this is the correct file to refer to? Yeah, that's the one I'm referring to. Thanks Alexander
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-emtop-baseboard.dts b/arch/arm64/boot/dts/freescale/imx8mm-emtop-baseboard.dts index 7d2cb74c64ee..322338e626ce 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-emtop-baseboard.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-emtop-baseboard.dts @@ -11,6 +11,113 @@ / { model = "Emtop Embedded Solutions i.MX8M Mini Baseboard V1"; compatible = "ees,imx8mm-emtop-baseboard", "ees,imx8mm-emtop-som", "fsl,imx8mm"; + + extcon_usb: extcon-usbotg1 { + compatible = "linux,extcon-usb-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_extcon_usb>; + id-gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>; + enable-gpio = <&gpio1 12 GPIO_ACTIVE_LOW>; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_led>; + + led-1 { + label = "buzzer"; + gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + }; + + can-control { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_cancontrol>; + reset-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>; + }; + + osc_can: clock-osc-can { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <16000000>; + clock-output-names = "osc-can"; + }; + + reg_audio: regulator-audio { + compatible = "regulator-fixed"; + regulator-name = "wm8904_supply"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + reg_wifi_vmmc: regulator-wifi-vmmc { + compatible = "regulator-fixed"; + regulator-name = "vmmc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio2 10 GPIO_ACTIVE_HIGH>; + enable-active-high; + startup-delay-us = <100>; + off-on-delay-us = <20000>; + }; + + sound-wm8904 { + compatible = "simple-audio-card"; + simple-audio-card,bitclock-master = <&dailink_master>; + simple-audio-card,format = "i2s"; + simple-audio-card,frame-master = <&dailink_master>; + simple-audio-card,name = "wm8904-audio"; + simple-audio-card,mclk-fs = <256>; + simple-audio-card,routing = + "Headphone Jack", "HPOUTL", + "Headphone Jack", "HPOUTR", + "IN2L", "Line In Jack", + "IN2R", "Line In Jack", + "Headphone Jack", "MICBIAS", + "IN1L", "Headphone Jack"; + + simple-audio-card,widgets = + "Microphone","Headphone Jack", + "Headphone", "Headphone Jack", + "Line", "Line In Jack"; + + dailink_master: simple-audio-card,codec { + sound-dai = <&wm8904>; + }; + + simple-audio-card,cpu { + sound-dai = <&sai3>; + }; + }; + + sound-spdif { + compatible = "fsl,imx-audio-spdif"; + model = "imx-spdif"; + spdif-controller = <&spdif1>; + spdif-out; + spdif-in; + }; +}; + +/* CAN BUS */ +&ecspi2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi2>; + status = "okay"; + + can: can@0 { + compatible = "microchip,mcp2515"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_canbus>; + reg = <0>; + clocks = <&osc_can>; + interrupt-parent = <&gpio1>; + interrupts = <14 IRQ_TYPE_EDGE_FALLING>; + spi-max-frequency = <10000000>; + }; }; &fec1 { @@ -40,7 +147,131 @@ vddio: vddio-regulator { }; }; +&i2c3 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + status = "okay"; + + rtc@32 { + compatible = "rx8025"; + reg = <0x32>; + }; + + wm8904: audio-codec@1a { + compatible = "wlf,wm8904"; + reg = <0x1a>; + #sound-dai-cells = <0>; + clocks = <&clk IMX8MM_CLK_SAI3_ROOT>; + clock-names = "mclk"; + DCVDD-supply = <®_audio>; + DBVDD-supply = <®_audio>; + AVDD-supply = <®_audio>; + CPVDD-supply = <®_audio>; + MICVDD-supply = <®_audio>; + }; +}; + +/* AUDIO */ +&sai3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sai3>; + assigned-clocks = <&clk IMX8MM_CLK_SAI3>; + assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>; + assigned-clock-rates = <24576000>; + status = "okay"; +}; + +&spdif1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spdif1>; + assigned-clocks = <&clk IMX8MM_CLK_SPDIF1>; + assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>; + assigned-clock-rates = <24576000>; + clocks = <&clk IMX8MM_CLK_AUDIO_AHB>, <&clk IMX8MM_CLK_24M>, + <&clk IMX8MM_CLK_SPDIF1>, <&clk IMX8MM_CLK_DUMMY>, + <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>, + <&clk IMX8MM_CLK_AUDIO_AHB>, <&clk IMX8MM_CLK_DUMMY>, + <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>, + <&clk IMX8MM_AUDIO_PLL1_OUT>, <&clk IMX8MM_AUDIO_PLL2_OUT>; + clock-names = "core", "rxtx0", "rxtx1", "rxtx2", "rxtx3", + "rxtx4", "rxtx5", "rxtx6", "rxtx7", "spba", "pll8k", "pll11k"; + status = "okay"; +}; + +/* USBOTG */ +&usbotg1 { + dr_mode = "otg"; + extcon = <&extcon_usb>; + status = "okay"; +}; + +&usbotg2 { + dr_mode = "host"; + status = "okay"; +}; + +/* Wifi */ +&usdhc1 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>; + pinctrl-1 = <&pinctrl_usdhc1_100mhz>, <&pinctrl_usdhc1_gpio>; + pinctrl-2 = <&pinctrl_usdhc1_200mhz>, <&pinctrl_usdhc1_gpio>; + bus-width = <4>; + vmmc-supply = <®_wifi_vmmc>; + cap-power-off-card; + keep-power-in-suspend; + non-removable; + status = "okay"; + + #address-cells = <1>; + #size-cells = <0>; + wifi: wifi@1 { + compatible = "brcm,bcm4329-fmac"; + reg = <1>; + interrupt-parent = <&gpio2>; + interrupts = <9 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "host-wake"; + }; +}; + +/* SD-card */ +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; + pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; + pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; + cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; + bus-width = <4>; + status = "okay"; +}; + &iomuxc { + + pinctrl_canbus: canbusgrp { + fsl,pins = < + MX8MM_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x14 + >; + }; + pinctrl_cancontrol: cancontrolgrp { + fsl,pins = < + MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x19 /* CAN reset */ + >; + }; + pinctrl_ecspi2: ecspi2grp { + fsl,pins = < + MX8MM_IOMUXC_ECSPI2_SS0_ECSPI2_SS0 0x82 + MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x82 + MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x82 + MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82 + >; + }; + pinctrl_extcon_usb: extconusbgrp { + fsl,pins = < + MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x140 /* otg_id */ + MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x19 /* otg_vbus */ + >; + }; pinctrl_fec1: fec1grp { fsl,pins = < MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3 @@ -60,4 +291,96 @@ MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x19 >; }; + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3 + MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3 + >; + }; + pinctrl_sai3: sai3grp { + fsl,pins = < + MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6 + MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6 + MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6 + MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6 + MX8MM_IOMUXC_SAI3_RXD_SAI3_RX_DATA0 0xd6 + >; + }; + pinctrl_spdif1: spdif1grp { + fsl,pins = < + MX8MM_IOMUXC_SPDIF_TX_SPDIF1_OUT 0xd6 + >; + }; + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190 + MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0 + MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0 + MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0 + MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0 + MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0 + >; + }; + pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp{ + fsl,pins = < + MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x194 + MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d4 + MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d4 + MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d4 + MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d4 + MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d4 + >; + }; + pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { + fsl,pins = < + MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x196 + MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d6 + MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d6 + MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d6 + MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d6 + MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d6 + >; + }; + pinctrl_usdhc1_gpio: usdhc1-gpiogrp { + fsl,pins = < + MX8MM_IOMUXC_SD1_RESET_B_GPIO2_IO10 0x41 /* wl_reg_on */ + MX8MM_IOMUXC_SD1_DATA7_GPIO2_IO9 0x41 /* wl_host_wake */ + MX8MM_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K 0x141 /* LP0: 32KHz */ + >; + }; + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 + MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 + MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 + MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 + MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 + MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 + >; + }; + pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { + fsl,pins = < + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194 + MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4 + MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4 + MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 + MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 + MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 + >; + }; + pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { + fsl,pins = < + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196 + MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6 + MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6 + MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 + MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 + MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 + >; + }; + pinctrl_usdhc2_gpio: usdhc2-gpiogrp { + fsl,pins = < + MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x1c4 + >; + }; };
Add following peripherals support for the Emtop i.MX8M Mini Baseboard * Wi-Fi * Audio * SD card * RTC * CAN bus * USB OTG Signed-off-by: Tarang Raval <tarang.raval@siliconsignals.io> --- Changes in v2: 1. Updated the node name and pinctrl name 2. Removed the 'regulators' container 3. Removed a stray blank line 4. Removed non-existent properties 5. Removed unused node and pinctrl - modem-reset - pinctrl_uart1 6. Defined the CAN transceiver reset GPIO separately --- .../dts/freescale/imx8mm-emtop-baseboard.dts | 323 ++++++++++++++++++ 1 file changed, 323 insertions(+)