| Message ID | 20240820100349.3544850-2-maz@kernel.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | KVM: arm64: Handle the lack of GICv3 exposed to a guest | expand |
On Tue, Aug 20, 2024 at 11:03:38AM +0100, Marc Zyngier wrote: > On a system with a GICv3, if a guest hasn't been configured with > GICv3 and that the host is not capable of GICv2 emulation, > a write to any of the ICC_*SGI*_EL1 registers is trapped to EL2. > > We therefore try to emulate the SGI access, only to hit a NULL > pointer as no private interrupt is allocated (no GIC, remember?). > > The obvious fix is to give the guest what it deserves, in the > shape of a UNDEF exception. > > Reported-by: Alexander Potapenko <glider@google.com> > Signed-off-by: Marc Zyngier <maz@kernel.org> > Cc: stable@vger.kernel.org LGTM, and just as an FYI I do plan on grabbing this for 6.11
On Tue, 20 Aug 2024 22:46:30 +0100, Oliver Upton <oliver.upton@linux.dev> wrote: > > On Tue, Aug 20, 2024 at 11:03:38AM +0100, Marc Zyngier wrote: > > On a system with a GICv3, if a guest hasn't been configured with > > GICv3 and that the host is not capable of GICv2 emulation, > > a write to any of the ICC_*SGI*_EL1 registers is trapped to EL2. > > > > We therefore try to emulate the SGI access, only to hit a NULL > > pointer as no private interrupt is allocated (no GIC, remember?). > > > > The obvious fix is to give the guest what it deserves, in the > > shape of a UNDEF exception. > > > > Reported-by: Alexander Potapenko <glider@google.com> > > Signed-off-by: Marc Zyngier <maz@kernel.org> > > Cc: stable@vger.kernel.org > > LGTM, and just as an FYI I do plan on grabbing this for 6.11 Great, thanks. Are you planning to route this via arm64, given that Paolo is away for a bit? M.
On Wed, Aug 21, 2024 at 11:59:52AM +0100, Marc Zyngier wrote: > On Tue, 20 Aug 2024 22:46:30 +0100, > Oliver Upton <oliver.upton@linux.dev> wrote: > > > > On Tue, Aug 20, 2024 at 11:03:38AM +0100, Marc Zyngier wrote: > > > On a system with a GICv3, if a guest hasn't been configured with > > > GICv3 and that the host is not capable of GICv2 emulation, > > > a write to any of the ICC_*SGI*_EL1 registers is trapped to EL2. > > > > > > We therefore try to emulate the SGI access, only to hit a NULL > > > pointer as no private interrupt is allocated (no GIC, remember?). > > > > > > The obvious fix is to give the guest what it deserves, in the > > > shape of a UNDEF exception. > > > > > > Reported-by: Alexander Potapenko <glider@google.com> > > > Signed-off-by: Marc Zyngier <maz@kernel.org> > > > Cc: stable@vger.kernel.org > > > > LGTM, and just as an FYI I do plan on grabbing this for 6.11 > > Great, thanks. Are you planning to route this via arm64, given that > Paolo is away for a bit? Yup, exactly that. I'll send the PR in the next day or two when I have some time to kick the tires on everything.
On Tue, 20 Aug 2024 11:03:38 +0100, Marc Zyngier wrote: > On a system with a GICv3, if a guest hasn't been configured with > GICv3 and that the host is not capable of GICv2 emulation, > a write to any of the ICC_*SGI*_EL1 registers is trapped to EL2. > > We therefore try to emulate the SGI access, only to hit a NULL > pointer as no private interrupt is allocated (no GIC, remember?). > > [...] Applied to kvmarm/fixes, thanks! [01/12] KVM: arm64: Make ICC_*SGI*_EL1 undef in the absence of a vGICv3 https://git.kernel.org/kvmarm/kvmarm/c/3e6245ebe7ef -- Best, Oliver
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index c90324060436..31e49da867ff 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -33,6 +33,7 @@ #include <trace/events/kvm.h> #include "sys_regs.h" +#include "vgic/vgic.h" #include "trace.h" @@ -435,6 +436,11 @@ static bool access_gic_sgi(struct kvm_vcpu *vcpu, { bool g1; + if (!kvm_has_gicv3(vcpu->kvm)) { + kvm_inject_undefined(vcpu); + return false; + } + if (!p->is_write) return read_from_write_only(vcpu, p, r); diff --git a/arch/arm64/kvm/vgic/vgic.h b/arch/arm64/kvm/vgic/vgic.h index ba8f790431bd..8532bfe3fed4 100644 --- a/arch/arm64/kvm/vgic/vgic.h +++ b/arch/arm64/kvm/vgic/vgic.h @@ -346,4 +346,11 @@ void vgic_v4_configure_vsgis(struct kvm *kvm); void vgic_v4_get_vlpi_state(struct vgic_irq *irq, bool *val); int vgic_v4_request_vpe_irq(struct kvm_vcpu *vcpu, int irq); +static inline bool kvm_has_gicv3(struct kvm *kvm) +{ + return (static_branch_unlikely(&kvm_vgic_global_state.gicv3_cpuif) && + irqchip_in_kernel(kvm) && + kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3); +} + #endif
On a system with a GICv3, if a guest hasn't been configured with GICv3 and that the host is not capable of GICv2 emulation, a write to any of the ICC_*SGI*_EL1 registers is trapped to EL2. We therefore try to emulate the SGI access, only to hit a NULL pointer as no private interrupt is allocated (no GIC, remember?). The obvious fix is to give the guest what it deserves, in the shape of a UNDEF exception. Reported-by: Alexander Potapenko <glider@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Cc: stable@vger.kernel.org --- arch/arm64/kvm/sys_regs.c | 6 ++++++ arch/arm64/kvm/vgic/vgic.h | 7 +++++++ 2 files changed, 13 insertions(+)