| Message ID | 20240822170951.339492-3-abdellatif.elkhlifi@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | remoteproc: arm64: Introduce remoteproc support for Corstone-1000 External Systems | expand |
On Thu, Aug 22, 2024 at 06:09:48PM +0100, Abdellatif El Khlifi wrote: > Add devicetree binding schema for the SSE-710 Host Base System Control > > SSE-710 is implemented by the Corstone-1000 IoT Reference Design > Platform [1]. > > The Host Base System Control has registers to control the clocks, power, > and reset for SSE-710 subsystem [2]. It resides within AONTOP power domain. > The registers are mapped under the SSE-710 Host System memory map [3]. > > [1]: https://developer.arm.com/Processors/Corstone-1000 > [2]: https://developer.arm.com/documentation/102342/latest/ > [3]: https://developer.arm.com/documentation/102342/0000/Programmers-model/Register-descriptions/Host-Base-System-Control-register-summary > > Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com> > --- > .../arm/arm,sse710-host-base-sysctrl.yaml | 56 +++++++++++++++++++ > 1 file changed, 56 insertions(+) > create mode 100644 Documentation/devicetree/bindings/arm/arm,sse710-host-base-sysctrl.yaml > > diff --git a/Documentation/devicetree/bindings/arm/arm,sse710-host-base-sysctrl.yaml b/Documentation/devicetree/bindings/arm/arm,sse710-host-base-sysctrl.yaml > new file mode 100644 > index 000000000000..e344a73e329d > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/arm,sse710-host-base-sysctrl.yaml > @@ -0,0 +1,56 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/arm/arm,sse710-host-base-sysctrl.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: SSE-710 Host Base System Control > + > +maintainers: > + - Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com> > + - Hugues Kamba Mpiana <hugues.kambampiana@arm.com> > + > +description: |+ Drop |+ > + The Host Base System Control has registers to control the clocks, power, and > + reset for SSE-710 subsystem. It resides within AONTOP power domain. > + The registers are mapped under the SSE-710 Host System memory map. > + > +properties: > + compatible: > + items: > + - enum: > + - arm,sse710-host-base-sysctrl > + - const: simple-mfd > + - const: syscon > + > + reg: > + maxItems: 1 > + > +patternProperties: > + "^extsys[0-1]$": ^remoteproc-[01]$ > + description: > + SSE-710 subsystem supports up to two External Systems. > + $ref: /schemas/remoteproc/arm,sse710-extsys.yaml# > + unevaluatedProperties: false > + > +additionalProperties: false This goes after "required:" block. > + > +required: > + - compatible Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/arm/arm,sse710-host-base-sysctrl.yaml b/Documentation/devicetree/bindings/arm/arm,sse710-host-base-sysctrl.yaml new file mode 100644 index 000000000000..e344a73e329d --- /dev/null +++ b/Documentation/devicetree/bindings/arm/arm,sse710-host-base-sysctrl.yaml @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/arm,sse710-host-base-sysctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SSE-710 Host Base System Control + +maintainers: + - Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com> + - Hugues Kamba Mpiana <hugues.kambampiana@arm.com> + +description: |+ + The Host Base System Control has registers to control the clocks, power, and + reset for SSE-710 subsystem. It resides within AONTOP power domain. + The registers are mapped under the SSE-710 Host System memory map. + +properties: + compatible: + items: + - enum: + - arm,sse710-host-base-sysctrl + - const: simple-mfd + - const: syscon + + reg: + maxItems: 1 + +patternProperties: + "^extsys[0-1]$": + description: + SSE-710 subsystem supports up to two External Systems. + $ref: /schemas/remoteproc/arm,sse710-extsys.yaml# + unevaluatedProperties: false + +additionalProperties: false + +required: + - compatible + - reg + +examples: + - | + syscon@1a010000 { + compatible = "arm,sse710-host-base-sysctrl", "simple-mfd", "syscon"; + reg = <0x1a010000 0x1000>; + + extsys0 { + compatible = "arm,sse710-extsys"; + firmware-name = "es_flashfw.elf"; + #extsys-id = <0>; + mbox-names = "txes0", "rxes0"; + mboxes = <&mhu0_hes0 0 1>, <&mhu0_es0h 0 1>; + memory-region = <&extsys0_vring0>, <&extsys0_vring1>; + }; + };
Add devicetree binding schema for the SSE-710 Host Base System Control SSE-710 is implemented by the Corstone-1000 IoT Reference Design Platform [1]. The Host Base System Control has registers to control the clocks, power, and reset for SSE-710 subsystem [2]. It resides within AONTOP power domain. The registers are mapped under the SSE-710 Host System memory map [3]. [1]: https://developer.arm.com/Processors/Corstone-1000 [2]: https://developer.arm.com/documentation/102342/latest/ [3]: https://developer.arm.com/documentation/102342/0000/Programmers-model/Register-descriptions/Host-Base-System-Control-register-summary Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com> --- .../arm/arm,sse710-host-base-sysctrl.yaml | 56 +++++++++++++++++++ 1 file changed, 56 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/arm,sse710-host-base-sysctrl.yaml