diff mbox series

[v4,2/5] arm64: dts: ti: k3-j784s4*: Remove bootph properties from parent nodes

Message ID 20240814-b4-upstream-bootph-all-v4-2-f2b462000f25@ti.com (mailing list archive)
State New, archived
Headers show
Series Add bootph-all property for J7 boards | expand

Commit Message

Manorit Chawdhry Aug. 14, 2024, 7:47 a.m. UTC 
Removes bootph-* properties from parent nodes and adds bootph for other
bootloader nodes.

Also moves bootph from mcu_timer1 to mcu_timer0 as that is the one that
is used in bootloader.

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
---
 arch/arm64/boot/dts/ti/k3-j784s4-evm.dts         | 10 +---------
 arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 10 ++++++----
 2 files changed, 7 insertions(+), 13 deletions(-)

Comments

Nishanth Menon Aug. 24, 2024, 5:52 p.m. UTC | #1 
On 13:17-20240814, Manorit Chawdhry wrote:
> Removes bootph-* properties from parent nodes and adds bootph for other
> bootloader nodes.

Why? What is the rationale for the change please?

> 
> Also moves bootph from mcu_timer1 to mcu_timer0 as that is the one that
> is used in bootloader.

Multiple patches please - the above sounds like a specific bug fix.

> 
> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
> ---
>  arch/arm64/boot/dts/ti/k3-j784s4-evm.dts         | 10 +---------
>  arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 10 ++++++----
>  2 files changed, 7 insertions(+), 13 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
> index ffa38f41679d..08f4791a3ee8 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
> @@ -334,7 +334,6 @@ &wkup_gpio0 {
>  };
>  
>  &main_pmx0 {
> -	bootph-all;
>  	main_cpsw2g_default_pins: main-cpsw2g-default-pins {
>  		pinctrl-single,pins = <
>  			J784S4_IOPAD(0x0b8, PIN_INPUT, 6) /* (AC34) MCASP1_ACLKX.RGMII1_RD0 */
> @@ -461,7 +460,6 @@ J784S4_IOPAD(0x078, PIN_OUTPUT, 1) /* (AH37) MCAN2_RX.AUDIO_EXT_REFCLK1 */
>  };
>  
>  &wkup_pmx2 {
> -	bootph-all;
>  	wkup_uart0_pins_default: wkup-uart0-default-pins {
>  		bootph-all;
>  		pinctrl-single,pins = <
> @@ -577,7 +575,6 @@ J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 7)
>  };
>  
>  &wkup_pmx0 {
> -	bootph-all;
>  	mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
>  		bootph-all;
>  		pinctrl-single,pins = <
> @@ -597,7 +594,6 @@ J784S4_WKUP_IOPAD(0x008, PIN_INPUT, 0) /* (C34) MCU_OSPI0_DQS */
>  };
>  
>  &wkup_pmx1 {
> -	bootph-all;
>  	mcu_fss0_ospi0_1_pins_default: mcu-fss0-ospi0-1-default-pins {
>  		bootph-all;
>  		pinctrl-single,pins = <
> @@ -668,6 +664,7 @@ bucka12: buck12 {
>  				regulator-max-microvolt = <1100000>;
>  				regulator-boot-on;
>  				regulator-always-on;
> +				bootph-pre-ram;
>  			};
>  
>  			bucka3: buck3 {
> @@ -769,18 +766,15 @@ &ufs_wrapper {
>  };
>  
>  &fss {
> -	bootph-all;
>  	status = "okay";
>  };
>  
>  &ospi0 {
> -	bootph-all;
>  	status = "okay";
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&mcu_fss0_ospi0_pins_default>, <&mcu_fss0_ospi0_1_pins_default>;
>  
>  	flash@0 {
> -		bootph-all;
>  		compatible = "jedec,spi-nor";
>  		reg = <0x0>;
>  		spi-tx-bus-width = <8>;
> @@ -837,13 +831,11 @@ partition@3fc0000 {
>  };
>  
>  &ospi1 {
> -	bootph-all;
>  	status = "okay";
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&mcu_fss0_ospi1_pins_default>;
>  
>  	flash@0 {
> -		bootph-all;
>  		compatible = "jedec,spi-nor";
>  		reg = <0x0>;
>  		spi-tx-bus-width = <1>;
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
> index f3a6ed1c979d..6409e702ffd4 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
> @@ -7,7 +7,6 @@
>  
>  &cbass_mcu_wakeup {
>  	sms: system-controller@44083000 {
> -		bootph-all;
>  		compatible = "ti,k2g-sci";
>  		ti,host-id = <12>;
>  
> @@ -39,7 +38,6 @@ k3_reset: reset-controller {
>  	};
>  
>  	wkup_conf: bus@43000000 {
> -		bootph-all;
>  		compatible = "simple-bus";
>  		#address-cells = <1>;
>  		#size-cells = <1>;
> @@ -59,6 +57,8 @@ secure_proxy_sa3: mailbox@43600000 {
>  		reg = <0x00 0x43600000 0x00 0x10000>,
>  		      <0x00 0x44880000 0x00 0x20000>,
>  		      <0x00 0x44860000 0x00 0x20000>;
> +		bootph-pre-ram;
> +
>  		/*
>  		 * Marked Disabled:
>  		 * Node is incomplete as it is meant for bootloaders and
> @@ -172,13 +172,13 @@ mcu_timer0: timer@40400000 {
>  		assigned-clocks = <&k3_clks 35 2>;
>  		assigned-clock-parents = <&k3_clks 35 3>;
>  		power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>;
> +		bootph-all;
>  		ti,timer-pwm;
>  		/* Non-MPU Firmware usage */
>  		status = "reserved";
>  	};
>  
>  	mcu_timer1: timer@40410000 {
> -		bootph-all;
>  		compatible = "ti,am654-timer";
>  		reg = <0x00 0x40410000 0x00 0x400>;
>  		interrupts = <GIC_SPI 817 IRQ_TYPE_LEVEL_HIGH>;
> @@ -458,7 +458,6 @@ mcu_spi2: spi@40320000 {
>  	};
>  
>  	mcu_navss: bus@28380000 {
> -		bootph-all;
>  		compatible = "simple-bus";
>  		#address-cells = <2>;
>  		#size-cells = <2>;
> @@ -515,6 +514,8 @@ secure_proxy_mcu: mailbox@2a480000 {
>  		reg = <0x00 0x2a480000 0x00 0x80000>,
>  		      <0x00 0x2a380000 0x00 0x80000>,
>  		      <0x00 0x2a400000 0x00 0x80000>;
> +		bootph-pre-ram;
> +
>  		/*
>  		 * Marked Disabled:
>  		 * Node is incomplete as it is meant for bootloaders and
> @@ -632,6 +633,7 @@ wkup_vtm0: temperature-sensor@42040000 {
>  		      <0x00 0x42050000 0x00 0x350>;
>  		power-domains = <&k3_pds 243 TI_SCI_PD_SHARED>;
>  		#thermal-sensor-cells = <1>;
> +		bootph-pre-ram;
>  	};
>  
>  	tscadc0: tscadc@40200000 {
> 
> -- 
> 2.46.0
>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
index ffa38f41679d..08f4791a3ee8 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
@@ -334,7 +334,6 @@  &wkup_gpio0 {
 };
 
 &main_pmx0 {
-	bootph-all;
 	main_cpsw2g_default_pins: main-cpsw2g-default-pins {
 		pinctrl-single,pins = <
 			J784S4_IOPAD(0x0b8, PIN_INPUT, 6) /* (AC34) MCASP1_ACLKX.RGMII1_RD0 */
@@ -461,7 +460,6 @@  J784S4_IOPAD(0x078, PIN_OUTPUT, 1) /* (AH37) MCAN2_RX.AUDIO_EXT_REFCLK1 */
 };
 
 &wkup_pmx2 {
-	bootph-all;
 	wkup_uart0_pins_default: wkup-uart0-default-pins {
 		bootph-all;
 		pinctrl-single,pins = <
@@ -577,7 +575,6 @@  J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 7)
 };
 
 &wkup_pmx0 {
-	bootph-all;
 	mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
 		bootph-all;
 		pinctrl-single,pins = <
@@ -597,7 +594,6 @@  J784S4_WKUP_IOPAD(0x008, PIN_INPUT, 0) /* (C34) MCU_OSPI0_DQS */
 };
 
 &wkup_pmx1 {
-	bootph-all;
 	mcu_fss0_ospi0_1_pins_default: mcu-fss0-ospi0-1-default-pins {
 		bootph-all;
 		pinctrl-single,pins = <
@@ -668,6 +664,7 @@  bucka12: buck12 {
 				regulator-max-microvolt = <1100000>;
 				regulator-boot-on;
 				regulator-always-on;
+				bootph-pre-ram;
 			};
 
 			bucka3: buck3 {
@@ -769,18 +766,15 @@  &ufs_wrapper {
 };
 
 &fss {
-	bootph-all;
 	status = "okay";
 };
 
 &ospi0 {
-	bootph-all;
 	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&mcu_fss0_ospi0_pins_default>, <&mcu_fss0_ospi0_1_pins_default>;
 
 	flash@0 {
-		bootph-all;
 		compatible = "jedec,spi-nor";
 		reg = <0x0>;
 		spi-tx-bus-width = <8>;
@@ -837,13 +831,11 @@  partition@3fc0000 {
 };
 
 &ospi1 {
-	bootph-all;
 	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&mcu_fss0_ospi1_pins_default>;
 
 	flash@0 {
-		bootph-all;
 		compatible = "jedec,spi-nor";
 		reg = <0x0>;
 		spi-tx-bus-width = <1>;
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
index f3a6ed1c979d..6409e702ffd4 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
@@ -7,7 +7,6 @@ 
 
 &cbass_mcu_wakeup {
 	sms: system-controller@44083000 {
-		bootph-all;
 		compatible = "ti,k2g-sci";
 		ti,host-id = <12>;
 
@@ -39,7 +38,6 @@  k3_reset: reset-controller {
 	};
 
 	wkup_conf: bus@43000000 {
-		bootph-all;
 		compatible = "simple-bus";
 		#address-cells = <1>;
 		#size-cells = <1>;
@@ -59,6 +57,8 @@  secure_proxy_sa3: mailbox@43600000 {
 		reg = <0x00 0x43600000 0x00 0x10000>,
 		      <0x00 0x44880000 0x00 0x20000>,
 		      <0x00 0x44860000 0x00 0x20000>;
+		bootph-pre-ram;
+
 		/*
 		 * Marked Disabled:
 		 * Node is incomplete as it is meant for bootloaders and
@@ -172,13 +172,13 @@  mcu_timer0: timer@40400000 {
 		assigned-clocks = <&k3_clks 35 2>;
 		assigned-clock-parents = <&k3_clks 35 3>;
 		power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>;
+		bootph-all;
 		ti,timer-pwm;
 		/* Non-MPU Firmware usage */
 		status = "reserved";
 	};
 
 	mcu_timer1: timer@40410000 {
-		bootph-all;
 		compatible = "ti,am654-timer";
 		reg = <0x00 0x40410000 0x00 0x400>;
 		interrupts = <GIC_SPI 817 IRQ_TYPE_LEVEL_HIGH>;
@@ -458,7 +458,6 @@  mcu_spi2: spi@40320000 {
 	};
 
 	mcu_navss: bus@28380000 {
-		bootph-all;
 		compatible = "simple-bus";
 		#address-cells = <2>;
 		#size-cells = <2>;
@@ -515,6 +514,8 @@  secure_proxy_mcu: mailbox@2a480000 {
 		reg = <0x00 0x2a480000 0x00 0x80000>,
 		      <0x00 0x2a380000 0x00 0x80000>,
 		      <0x00 0x2a400000 0x00 0x80000>;
+		bootph-pre-ram;
+
 		/*
 		 * Marked Disabled:
 		 * Node is incomplete as it is meant for bootloaders and
@@ -632,6 +633,7 @@  wkup_vtm0: temperature-sensor@42040000 {
 		      <0x00 0x42050000 0x00 0x350>;
 		power-domains = <&k3_pds 243 TI_SCI_PD_SHARED>;
 		#thermal-sensor-cells = <1>;
+		bootph-pre-ram;
 	};
 
 	tscadc0: tscadc@40200000 {