diff mbox series

[v3] i3c: master: support to adjust first broadcast address speed

Message ID 20240826050957.1881563-1-carlos.song@nxp.com (mailing list archive)
State Superseded
Headers show
Series [v3] i3c: master: support to adjust first broadcast address speed | expand

Commit Message

Carlos Song Aug. 26, 2024, 5:09 a.m. UTC 
From: Carlos Song <carlos.song@nxp.com>

According to I3C spec 6.2 Timing Specification, the Open Drain High Period
of SCL Clock timing for first broadcast address should be adjusted to 200ns
at least. I3C device working as i2c device will see the broadcast to close
its Spike Filter then change to work at I3C mode. After that I3C open drain
SCL high level should be adjusted back.

Signed-off-by: Carlos Song <carlos.song@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
---
 drivers/i3c/master.c       | 12 ++++++++++++
 include/linux/i3c/master.h | 16 ++++++++++++++++
 2 files changed, 28 insertions(+)

Comments

Miquel Raynal Aug. 26, 2024, 8:13 a.m. UTC | #1 
Hi Carlos,

carlos.song@nxp.com wrote on Mon, 26 Aug 2024 13:09:57 +0800:

> From: Carlos Song <carlos.song@nxp.com>
> 
> According to I3C spec 6.2 Timing Specification, the Open Drain High Period
> of SCL Clock timing for first broadcast address should be adjusted to 200ns
> at least. I3C device working as i2c device will see the broadcast to close
> its Spike Filter then change to work at I3C mode. After that I3C open drain
> SCL high level should be adjusted back.
> 
> Signed-off-by: Carlos Song <carlos.song@nxp.com>
> Reviewed-by: Frank Li <Frank.Li@nxp.com>

Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>

Frank, did you test it with eg. the Silvaco master?

Thanks,
Miquèl
Frank Li Aug. 26, 2024, 4:04 p.m. UTC | #2 
On Mon, Aug 26, 2024 at 10:13:23AM +0200, Miquel Raynal wrote:
> Hi Carlos,
>
> carlos.song@nxp.com wrote on Mon, 26 Aug 2024 13:09:57 +0800:
>
> > From: Carlos Song <carlos.song@nxp.com>
> >
> > According to I3C spec 6.2 Timing Specification, the Open Drain High Period
> > of SCL Clock timing for first broadcast address should be adjusted to 200ns
> > at least. I3C device working as i2c device will see the broadcast to close
> > its Spike Filter then change to work at I3C mode. After that I3C open drain
> > SCL high level should be adjusted back.
> >
> > Signed-off-by: Carlos Song <carlos.song@nxp.com>
> > Reviewed-by: Frank Li <Frank.Li@nxp.com>
>
> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
>
> Frank, did you test it with eg. the Silvaco master?

This problem only existed on one board with specific i2c devices. I have
not such boards in hand. Carlos work closely with me and tested by our test
team.

Frank

>
> Thanks,
> Miquèl
Miquel Raynal Aug. 26, 2024, 4:35 p.m. UTC | #3 
Hi Frank,

Frank.li@nxp.com wrote on Mon, 26 Aug 2024 12:04:44 -0400:

> On Mon, Aug 26, 2024 at 10:13:23AM +0200, Miquel Raynal wrote:
> > Hi Carlos,
> >
> > carlos.song@nxp.com wrote on Mon, 26 Aug 2024 13:09:57 +0800:
> >  
> > > From: Carlos Song <carlos.song@nxp.com>
> > >
> > > According to I3C spec 6.2 Timing Specification, the Open Drain High Period
> > > of SCL Clock timing for first broadcast address should be adjusted to 200ns
> > > at least. I3C device working as i2c device will see the broadcast to close
> > > its Spike Filter then change to work at I3C mode. After that I3C open drain
> > > SCL high level should be adjusted back.
> > >
> > > Signed-off-by: Carlos Song <carlos.song@nxp.com>
> > > Reviewed-by: Frank Li <Frank.Li@nxp.com>  
> >
> > Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
> >
> > Frank, did you test it with eg. the Silvaco master?  
> 
> This problem only existed on one board with specific i2c devices. I have
> not such boards in hand. Carlos work closely with me and tested by our test
> team.

I understand you may not experience the problem, but the solution must
not disturb setups without the problem either. That's why I was asking.

Thanks,
Miquèl
Frank Li Sept. 4, 2024, 7:07 p.m. UTC | #4 
On Mon, Aug 26, 2024 at 10:13:23AM +0200, Miquel Raynal wrote:
> Hi Carlos,
>
> carlos.song@nxp.com wrote on Mon, 26 Aug 2024 13:09:57 +0800:
>
> > From: Carlos Song <carlos.song@nxp.com>
> >

carlos:

	I just realize you missed sent out svc implement.

https://lore.kernel.org/linux-i3c/20240807061306.3143528-2-carlos.song@nxp.com/T/#u

	Suppose both patches should send out together.

Frank

> > According to I3C spec 6.2 Timing Specification, the Open Drain High Period
> > of SCL Clock timing for first broadcast address should be adjusted to 200ns
> > at least. I3C device working as i2c device will see the broadcast to close
> > its Spike Filter then change to work at I3C mode. After that I3C open drain
> > SCL high level should be adjusted back.
> >
> > Signed-off-by: Carlos Song <carlos.song@nxp.com>
> > Reviewed-by: Frank Li <Frank.Li@nxp.com>
>
> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
>
> Frank, did you test it with eg. the Silvaco master?
>
> Thanks,
> Miquèl
>
> --
> linux-i3c mailing list
> linux-i3c@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-i3c
diff mbox series

Patch

diff --git a/drivers/i3c/master.c b/drivers/i3c/master.c
index 7028f03c2c42..6f3eb710a75d 100644
--- a/drivers/i3c/master.c
+++ b/drivers/i3c/master.c
@@ -1868,6 +1868,12 @@  static int i3c_master_bus_init(struct i3c_master_controller *master)
 		goto err_bus_cleanup;
 	}
 
+	if (master->ops->set_speed) {
+		ret = master->ops->set_speed(master, I3C_OPEN_DRAIN_SLOW_SPEED);
+		if (ret)
+			goto err_bus_cleanup;
+	}
+
 	/*
 	 * Reset all dynamic address that may have been assigned before
 	 * (assigned by the bootloader for example).
@@ -1876,6 +1882,12 @@  static int i3c_master_bus_init(struct i3c_master_controller *master)
 	if (ret && ret != I3C_ERROR_M2)
 		goto err_bus_cleanup;
 
+	if (master->ops->set_speed) {
+		master->ops->set_speed(master, I3C_OPEN_DRAIN_NORMAL_SPEED);
+		if (ret)
+			goto err_bus_cleanup;
+	}
+
 	/* Disable all slave events before starting DAA. */
 	ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR,
 				      I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR |
diff --git a/include/linux/i3c/master.h b/include/linux/i3c/master.h
index 074f632868d9..2a1ed05d5782 100644
--- a/include/linux/i3c/master.h
+++ b/include/linux/i3c/master.h
@@ -277,6 +277,20 @@  enum i3c_bus_mode {
 	I3C_BUS_MODE_MIXED_SLOW,
 };
 
+/**
+ * enum i3c_open_drain_speed - I3C open-drain speed
+ * @I3C_OPEN_DRAIN_SLOW_SPEED: Slow open-drain speed for sending the first
+ *				broadcast address. The first broadcast address at this speed
+ *				will be visible to all devices on the I3C bus. I3C devices
+ *				working in I2C mode will turn off their spike filter when
+ *				switching into I3C mode.
+ * @I3C_OPEN_DRAIN_NORMAL_SPEED: Normal open-drain speed in I3C bus mode.
+ */
+enum i3c_open_drain_speed {
+	I3C_OPEN_DRAIN_SLOW_SPEED,
+	I3C_OPEN_DRAIN_NORMAL_SPEED,
+};
+
 /**
  * enum i3c_addr_slot_status - I3C address slot status
  * @I3C_ADDR_SLOT_FREE: address is free
@@ -436,6 +450,7 @@  struct i3c_bus {
  *		      NULL.
  * @enable_hotjoin: enable hot join event detect.
  * @disable_hotjoin: disable hot join event detect.
+ * @set_speed: adjust I3C open drain mode timing.
  */
 struct i3c_master_controller_ops {
 	int (*bus_init)(struct i3c_master_controller *master);
@@ -464,6 +479,7 @@  struct i3c_master_controller_ops {
 				 struct i3c_ibi_slot *slot);
 	int (*enable_hotjoin)(struct i3c_master_controller *master);
 	int (*disable_hotjoin)(struct i3c_master_controller *master);
+	int (*set_speed)(struct i3c_master_controller *master, enum i3c_open_drain_speed speed);
 };
 
 /**