Message ID | 20240824-topic-845_gpu_smmu-v2-1-a302b8acc052@quicinc.com (mailing list archive) |
---|---|
State | Not Applicable |
Headers | show |
Series | [v2] iommu/arm-smmu-qcom: Work around SDM845 Adreno SMMU w/ 16K pages | expand |
On Sat, 24 Aug 2024 01:12:01 +0200, Konrad Dybcio wrote: > SDM845's Adreno SMMU is unique in that it actually advertizes support > for 16K (and 32M) pages, which doesn't hold for newer SoCs. > > This however, seems either broken in the hardware implementation, the > hypervisor middleware that abstracts the SMMU, or there's a bug in the > Linux kernel somewhere down the line that nobody managed to track down. > > [...] Applied to will (for-joerg/arm-smmu/updates), thanks! [1/1] iommu/arm-smmu-qcom: Work around SDM845 Adreno SMMU w/ 16K pages https://git.kernel.org/will/c/2d42d3ba4437 Cheers,
diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c index 36c6b36ad4ff..cca6d5b0bf5d 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c @@ -338,6 +338,14 @@ static int qcom_smmu_cfg_probe(struct arm_smmu_device *smmu) return 0; } +static int qcom_adreno_smmuv2_cfg_probe(struct arm_smmu_device *smmu) +{ + /* Support for 16K pages is advertised on some SoCs, but it doesn't seem to work */ + smmu->features &= ~ARM_SMMU_FEAT_FMT_AARCH64_16K; + + return 0; +} + static void qcom_smmu_write_s2cr(struct arm_smmu_device *smmu, int idx) { struct arm_smmu_s2cr *s2cr = smmu->s2crs + idx; @@ -436,6 +444,7 @@ static const struct arm_smmu_impl sdm845_smmu_500_impl = { static const struct arm_smmu_impl qcom_adreno_smmu_v2_impl = { .init_context = qcom_adreno_smmu_init_context, + .cfg_probe = qcom_adreno_smmuv2_cfg_probe, .def_domain_type = qcom_smmu_def_domain_type, .alloc_context_bank = qcom_adreno_smmu_alloc_context_bank, .write_sctlr = qcom_adreno_smmu_write_sctlr,