x86emul: drop further Xeon Phi decode leftovers

Commit Message

Jan Beulich Aug. 27, 2024, 11:24 a.m. UTC

Special casing in x86emul_decode() can be dropped, while overrides done
in decode_0f38() can move into ext0f38_table[]. That table's S/G
prefetch entries aren't needed anymore either.

Signed-off-by: Jan Beulich <[e-mail]>

Comments

Andrew Cooper Aug. 27, 2024, 4:59 p.m. UTC | #1

On 27/08/2024 12:24 pm, Jan Beulich wrote:
> Special casing in x86emul_decode() can be dropped, while overrides done
> in decode_0f38() can move into ext0f38_table[]. That table's S/G
> prefetch entries aren't needed anymore either.
>
> Signed-off-by: Jan Beulich <[e-mail]>

Acked-by: Andrew Cooper <[e-mail]>

Patch

--- a/xen/arch/x86/x86_emulate/decode.c
+++ b/xen/arch/x86/x86_emulate/decode.c
@@ -427,13 +427,11 @@  static const struct ext0f38_table {
     [0xbe] = { .simd_size = simd_packed_fp, .d8s = d8s_vl },
     [0xbf] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq },
     [0xc4] = { .simd_size = simd_packed_int, .two_op = 1, .d8s = d8s_vl },
-    [0xc6 ... 0xc7] = { .simd_size = simd_other, .vsib = 1, .d8s = d8s_dq },
     [0xc8] = { .simd_size = simd_packed_fp, .two_op = 1, .d8s = d8s_vl },
     [0xc9] = { .simd_size = simd_other },
     [0xca] = { .simd_size = simd_packed_fp, .two_op = 1, .d8s = d8s_vl },
-    [0xcb] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq },
-    [0xcc] = { .simd_size = simd_packed_fp, .two_op = 1, .d8s = d8s_vl },
-    [0xcd] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq },
+    [0xcb] = { .simd_size = simd_other, .d8s = d8s_vl },
+    [0xcc ... 0xcd] = { .simd_size = simd_other, .two_op = 1, .d8s = d8s_vl },
     [0xcf] = { .simd_size = simd_packed_int, .d8s = d8s_vl },
     [0xd2] = { .simd_size = simd_other },
     [0xd3] = { .simd_size = simd_other },
@@ -918,14 +916,6 @@  decode_0f38(struct x86_emulate_state *s,
     case X86EMUL_OPC_EVEX_66(0, 0x7c): /* vpbroadcast{d,q} */
         break;
 
-    case X86EMUL_OPC_VEX_F2(0, 0xcc): /* vsha512msg1 */
-    case X86EMUL_OPC_VEX_F2(0, 0xcd): /* vsha512msg2 */
-        s->desc |= TwoOp;
-        /* fallthrough */
-    case X86EMUL_OPC_VEX_F2(0, 0xcb): /* vsha512rnds2 */
-        s->simd_size = simd_other;
-        break;
-
     case 0xf0: /* movbe / crc32 */
         s->desc |= s->vex.pfx == vex_f2 ? ByteOp : Mov;
         if ( s->vex.pfx >= vex_f3 )
@@ -1421,20 +1411,6 @@  int x86emul_decode(struct x86_emulate_st
                                                    s);
                     s->simd_size = simd_other;
                 }
-
-                switch ( b )
-                {
-                /* vp4dpwssd{,s} need special casing */
-                case 0x52: case 0x53:
-                /* v4f{,n}madd{p,s}s need special casing */
-                case 0x9a: case 0x9b: case 0xaa: case 0xab:
-                    if ( s->evex.pfx == vex_f2 )
-                    {
-                        disp8scale = 4;
-                        s->simd_size = simd_128;
-                    }
-                    break;
-                }
             }
             break;