diff mbox series

ARM: dts: microchip: sama7g5: Fix RTT clock

Message ID 20240826165320.3068359-1-claudiu.beznea@tuxon.dev (mailing list archive)
State New, archived
Headers show
Series ARM: dts: microchip: sama7g5: Fix RTT clock | expand

Commit Message

Claudiu Aug. 26, 2024, 4:53 p.m. UTC 
According to datasheet, Chapter 34. Clock Generator, section 34.2,
Embedded characteristics, source clock for RTT is the TD_SLCK, registered
with ID 1 by the slow clock controller driver. Fix RTT clock.

Fixes: 7540629e2fc7 ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek")
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
---
 arch/arm/boot/dts/microchip/sama7g5.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Claudiu Aug. 31, 2024, 3:29 p.m. UTC | #1 
On 26.08.2024 19:53, Claudiu Beznea wrote:
> According to datasheet, Chapter 34. Clock Generator, section 34.2,
> Embedded characteristics, source clock for RTT is the TD_SLCK, registered
> with ID 1 by the slow clock controller driver. Fix RTT clock.
> 
> Fixes: 7540629e2fc7 ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek")
> Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>

Applied to at91-dt, thanks!
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/microchip/sama7g5.dtsi b/arch/arm/boot/dts/microchip/sama7g5.dtsi
index 75778be126a3..17bcdcf0cf4a 100644
--- a/arch/arm/boot/dts/microchip/sama7g5.dtsi
+++ b/arch/arm/boot/dts/microchip/sama7g5.dtsi
@@ -272,7 +272,7 @@  rtt: rtc@e001d020 {
 			compatible = "microchip,sama7g5-rtt", "microchip,sam9x60-rtt", "atmel,at91sam9260-rtt";
 			reg = <0xe001d020 0x30>;
 			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&clk32k 0>;
+			clocks = <&clk32k 1>;
 		};
 
 		clk32k: clock-controller@e001d050 {