| Message ID | 20240903061757.1114957-2-fea.wang@sifive.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Introduce svukte ISA extension | expand |
On Tue, Sep 3, 2024 at 4:15 PM Fea.Wang <fea.wang@sifive.com> wrote: > > Refer to the draft of svukte extension from: > https://github.com/riscv/riscv-isa-manual/pull/1564 We won't be able to merge this while the spec is just a pull request. We need a fixes spec that we can point out with a version Alistair > > Svukte provides a means to make user-mode accesses to supervisor memory > raise page faults in constant time, mitigating attacks that attempt to > discover the supervisor software's address-space layout. > > Signed-off-by: Fea.Wang <fea.wang@sifive.com> > Reviewed-by: Frank Chang <frank.chang@sifive.com> > Reviewed-by: Jim Shu <jim.shu@sifive.com> > --- > target/riscv/cpu_cfg.h | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/target/riscv/cpu_cfg.h b/target/riscv/cpu_cfg.h > index 96fe26d4ea..636b12e1c2 100644 > --- a/target/riscv/cpu_cfg.h > +++ b/target/riscv/cpu_cfg.h > @@ -81,6 +81,7 @@ struct RISCVCPUConfig { > bool ext_svinval; > bool ext_svnapot; > bool ext_svpbmt; > + bool ext_svukte; > bool ext_zdinx; > bool ext_zaamo; > bool ext_zacas; > -- > 2.34.1 > >
diff --git a/target/riscv/cpu_cfg.h b/target/riscv/cpu_cfg.h index 96fe26d4ea..636b12e1c2 100644 --- a/target/riscv/cpu_cfg.h +++ b/target/riscv/cpu_cfg.h @@ -81,6 +81,7 @@ struct RISCVCPUConfig { bool ext_svinval; bool ext_svnapot; bool ext_svpbmt; + bool ext_svukte; bool ext_zdinx; bool ext_zaamo; bool ext_zacas;