diff mbox series

[can-next,v5,03/20] arm64: dts: rockchip: mecsbc: add CAN0 and CAN1 interfaces

Message ID 20240904-rockchip-canfd-v5-3-8ae22bcb27cc@pengutronix.de (mailing list archive)
State Awaiting Upstream
Headers show
Series can: rockchip_canfd: add support for CAN-FD IP core found on Rockchip RK3568 | expand

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Commit Message

Marc Kleine-Budde Sept. 4, 2024, 8:12 a.m. UTC
From: David Jander <david@protonic.nl>

This patch adds support for the CAN0 and CAN1 interfaces to the board.

Signed-off-by: David Jander <david@protonic.nl>
Tested-by: Alibek Omarov <a1ba.omarov@gmail.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
---
 arch/arm64/boot/dts/rockchip/rk3568-mecsbc.dts | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

Comments

Heiko Stübner Sept. 4, 2024, 8:52 a.m. UTC | #1
Am Mittwoch, 4. September 2024, 10:12:47 CEST schrieb Marc Kleine-Budde:
> From: David Jander <david@protonic.nl>
> 
> This patch adds support for the CAN0 and CAN1 interfaces to the board.
> 
> Signed-off-by: David Jander <david@protonic.nl>
> Tested-by: Alibek Omarov <a1ba.omarov@gmail.com>
> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
> ---
>  arch/arm64/boot/dts/rockchip/rk3568-mecsbc.dts | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3568-mecsbc.dts b/arch/arm64/boot/dts/rockchip/rk3568-mecsbc.dts
> index c2dfffc638d1..052ef03694cf 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3568-mecsbc.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3568-mecsbc.dts
> @@ -117,6 +117,20 @@ &cpu3 {
>  	cpu-supply = <&vdd_cpu>;
>  };
>  
> +&can0 {
> +	compatible = "rockchip,rk3568v3-canfd", "rockchip,rk3568v2-canfd";
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&can0m0_pins>;
> +	status = "okay";
> +};
> +
> +&can1 {
> +	compatible = "rockchip,rk3568v3-canfd", "rockchip,rk3568v2-canfd";
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&can1m1_pins>;
> +	status = "okay";
> +};
> +

cpu3 > can0 ... aka alphabetical sorting of phandles

Reviewed-by: Heiko Stuebner <heiko@sntech.de>

No need to resend for that though.


>  &gmac1 {
>  	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
>  	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
> 
>
Marc Kleine-Budde Sept. 4, 2024, 9:25 a.m. UTC | #2
On 04.09.2024 10:52:54, Heiko Stübner wrote:
> Am Mittwoch, 4. September 2024, 10:12:47 CEST schrieb Marc Kleine-Budde:
> > From: David Jander <david@protonic.nl>
> > 
> > This patch adds support for the CAN0 and CAN1 interfaces to the board.
> > 
> > Signed-off-by: David Jander <david@protonic.nl>
> > Tested-by: Alibek Omarov <a1ba.omarov@gmail.com>
> > Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
> > ---
> >  arch/arm64/boot/dts/rockchip/rk3568-mecsbc.dts | 14 ++++++++++++++
> >  1 file changed, 14 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/rockchip/rk3568-mecsbc.dts b/arch/arm64/boot/dts/rockchip/rk3568-mecsbc.dts
> > index c2dfffc638d1..052ef03694cf 100644
> > --- a/arch/arm64/boot/dts/rockchip/rk3568-mecsbc.dts
> > +++ b/arch/arm64/boot/dts/rockchip/rk3568-mecsbc.dts
> > @@ -117,6 +117,20 @@ &cpu3 {
> >  	cpu-supply = <&vdd_cpu>;
> >  };
> >  
> > +&can0 {
> > +	compatible = "rockchip,rk3568v3-canfd", "rockchip,rk3568v2-canfd";
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&can0m0_pins>;
> > +	status = "okay";
> > +};
> > +
> > +&can1 {
> > +	compatible = "rockchip,rk3568v3-canfd", "rockchip,rk3568v2-canfd";
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&can1m1_pins>;
> > +	status = "okay";
> > +};
> > +
> 
> cpu3 > can0 ... aka alphabetical sorting of phandles
> 
> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
> 
> No need to resend for that though.

Fixed.

Thanks,
Marc
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/rockchip/rk3568-mecsbc.dts b/arch/arm64/boot/dts/rockchip/rk3568-mecsbc.dts
index c2dfffc638d1..052ef03694cf 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-mecsbc.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-mecsbc.dts
@@ -117,6 +117,20 @@  &cpu3 {
 	cpu-supply = <&vdd_cpu>;
 };
 
+&can0 {
+	compatible = "rockchip,rk3568v3-canfd", "rockchip,rk3568v2-canfd";
+	pinctrl-names = "default";
+	pinctrl-0 = <&can0m0_pins>;
+	status = "okay";
+};
+
+&can1 {
+	compatible = "rockchip,rk3568v3-canfd", "rockchip,rk3568v2-canfd";
+	pinctrl-names = "default";
+	pinctrl-0 = <&can1m1_pins>;
+	status = "okay";
+};
+
 &gmac1 {
 	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
 	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;