| Message ID | 20240902143458.601578-6-Parthiban.Veerasooran@microchip.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | microchip_t1s: Update on Microchip 10BASE-T1S PHY driver | expand |
On Mon, Sep 02, 2024 at 08:04:56PM +0530, Parthiban Veerasooran wrote: > This patch adds support for LAN8670/1/2 Rev.C1 as per the latest > configuration note AN1699 released (Revision E (DS60001699F - June 2024)) > https://www.microchip.com/en-us/application-notes/an1699 > > Signed-off-by: Parthiban Veerasooran <Parthiban.Veerasooran@microchip.com> ... > diff --git a/drivers/net/phy/microchip_t1s.c b/drivers/net/phy/microchip_t1s.c ... > @@ -290,6 +291,58 @@ static int lan867x_check_reset_complete(struct phy_device *phydev) > return 0; > } > > +static int lan867x_revc1_config_init(struct phy_device *phydev) > +{ > + s8 offsets[2]; > + int ret; > + > + ret = lan867x_check_reset_complete(phydev); > + if (ret) > + return ret; > + > + ret = lan865x_generate_cfg_offsets(phydev, offsets); > + if (ret) > + return ret; > + > + /* LAN867x Rev.C1 configuration settings are equal to the first 9 > + * configuration settings and all the sqi fixup settings from LAN865x > + * Rev.B0/B1. So the same fixup registers and values from LAN865x > + * Rev.B0/B1 are used for LAN867x Rev.C1 to avoid duplication. > + * Refer the below links for the comparision. nit: comparison Flagged by checkpatch.pl --codespell > + * https://www.microchip.com/en-us/application-notes/an1760 > + * Revision F (DS60001760G - June 2024) > + * https://www.microchip.com/en-us/application-notes/an1699 > + * Revision E (DS60001699F - June 2024) > + */
Hi Simon, On 03/09/24 1:00 pm, Simon Horman wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > On Mon, Sep 02, 2024 at 08:04:56PM +0530, Parthiban Veerasooran wrote: >> This patch adds support for LAN8670/1/2 Rev.C1 as per the latest >> configuration note AN1699 released (Revision E (DS60001699F - June 2024)) >> https://www.microchip.com/en-us/application-notes/an1699 >> >> Signed-off-by: Parthiban Veerasooran <Parthiban.Veerasooran@microchip.com> > > ... > >> diff --git a/drivers/net/phy/microchip_t1s.c b/drivers/net/phy/microchip_t1s.c > > ... > >> @@ -290,6 +291,58 @@ static int lan867x_check_reset_complete(struct phy_device *phydev) >> return 0; >> } >> >> +static int lan867x_revc1_config_init(struct phy_device *phydev) >> +{ >> + s8 offsets[2]; >> + int ret; >> + >> + ret = lan867x_check_reset_complete(phydev); >> + if (ret) >> + return ret; >> + >> + ret = lan865x_generate_cfg_offsets(phydev, offsets); >> + if (ret) >> + return ret; >> + >> + /* LAN867x Rev.C1 configuration settings are equal to the first 9 >> + * configuration settings and all the sqi fixup settings from LAN865x >> + * Rev.B0/B1. So the same fixup registers and values from LAN865x >> + * Rev.B0/B1 are used for LAN867x Rev.C1 to avoid duplication. >> + * Refer the below links for the comparision. > > nit: comparison > > Flagged by checkpatch.pl --codespell Ah yes, will correct it in the next version. Best regards, Parthiban V > >> + * https://www.microchip.com/en-us/application-notes/an1760 >> + * Revision F (DS60001760G - June 2024) >> + * https://www.microchip.com/en-us/application-notes/an1699 >> + * Revision E (DS60001699F - June 2024) >> + */
diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig index f18defab70cf..04f605606a8a 100644 --- a/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig @@ -292,7 +292,7 @@ config MICREL_PHY config MICROCHIP_T1S_PHY tristate "Microchip 10BASE-T1S Ethernet PHYs" help - Currently supports the LAN8670/1/2 Rev.B1 and LAN8650/1 Rev.B0/B1 + Currently supports the LAN8670/1/2 Rev.B1/C1 and LAN8650/1 Rev.B0/B1 Internal PHYs. config MICROCHIP_PHY diff --git a/drivers/net/phy/microchip_t1s.c b/drivers/net/phy/microchip_t1s.c index 5d133261dd69..62f5ce548c6a 100644 --- a/drivers/net/phy/microchip_t1s.c +++ b/drivers/net/phy/microchip_t1s.c @@ -3,7 +3,7 @@ * Driver for Microchip 10BASE-T1S PHYs * * Support: Microchip Phys: - * lan8670/1/2 Rev.B1 + * lan8670/1/2 Rev.B1/C1 * lan8650/1 Rev.B0/B1 Internal PHYs */ @@ -12,6 +12,7 @@ #include <linux/phy.h> #define PHY_ID_LAN867X_REVB1 0x0007C162 +#define PHY_ID_LAN867X_REVC1 0x0007C164 /* Both Rev.B0 and B1 clause 22 PHYID's are same due to B1 chip limitation */ #define PHY_ID_LAN865X_REVB 0x0007C1B3 @@ -290,6 +291,58 @@ static int lan867x_check_reset_complete(struct phy_device *phydev) return 0; } +static int lan867x_revc1_config_init(struct phy_device *phydev) +{ + s8 offsets[2]; + int ret; + + ret = lan867x_check_reset_complete(phydev); + if (ret) + return ret; + + ret = lan865x_generate_cfg_offsets(phydev, offsets); + if (ret) + return ret; + + /* LAN867x Rev.C1 configuration settings are equal to the first 9 + * configuration settings and all the sqi fixup settings from LAN865x + * Rev.B0/B1. So the same fixup registers and values from LAN865x + * Rev.B0/B1 are used for LAN867x Rev.C1 to avoid duplication. + * Refer the below links for the comparision. + * https://www.microchip.com/en-us/application-notes/an1760 + * Revision F (DS60001760G - June 2024) + * https://www.microchip.com/en-us/application-notes/an1699 + * Revision E (DS60001699F - June 2024) + */ + for (int i = 0; i < 9; i++) { + ret = phy_write_mmd(phydev, MDIO_MMD_VEND2, + lan865x_revb_fixup_registers[i], + lan865x_revb_fixup_values[i]); + if (ret) + return ret; + + if (i == 1) { + ret = lan865x_setup_cfgparam(phydev, offsets); + if (ret) + return ret; + } + } + + ret = lan865x_setup_sqi_cfgparam(phydev, offsets); + if (ret) + return ret; + + for (int i = 0; i < ARRAY_SIZE(lan865x_revb_sqi_fixup_regs); i++) { + ret = phy_write_mmd(phydev, MDIO_MMD_VEND2, + lan865x_revb_sqi_fixup_regs[i], + lan865x_revb_sqi_fixup_values[i]); + if (ret) + return ret; + } + + return 0; +} + static int lan867x_revb1_config_init(struct phy_device *phydev) { int err; @@ -342,6 +395,16 @@ static struct phy_driver microchip_t1s_driver[] = { .set_plca_cfg = genphy_c45_plca_set_cfg, .get_plca_status = genphy_c45_plca_get_status, }, + { + PHY_ID_MATCH_EXACT(PHY_ID_LAN867X_REVC1), + .name = "LAN867X Rev.C1", + .features = PHY_BASIC_T1S_P2MP_FEATURES, + .config_init = lan867x_revc1_config_init, + .read_status = lan86xx_read_status, + .get_plca_cfg = genphy_c45_plca_get_cfg, + .set_plca_cfg = genphy_c45_plca_set_cfg, + .get_plca_status = genphy_c45_plca_get_status, + }, { PHY_ID_MATCH_EXACT(PHY_ID_LAN865X_REVB), .name = "LAN865X Rev.B0/B1 Internal Phy", @@ -358,6 +421,7 @@ module_phy_driver(microchip_t1s_driver); static struct mdio_device_id __maybe_unused tbl[] = { { PHY_ID_MATCH_EXACT(PHY_ID_LAN867X_REVB1) }, + { PHY_ID_MATCH_EXACT(PHY_ID_LAN867X_REVC1) }, { PHY_ID_MATCH_EXACT(PHY_ID_LAN865X_REVB) }, { } };
This patch adds support for LAN8670/1/2 Rev.C1 as per the latest configuration note AN1699 released (Revision E (DS60001699F - June 2024)) https://www.microchip.com/en-us/application-notes/an1699 Signed-off-by: Parthiban Veerasooran <Parthiban.Veerasooran@microchip.com> --- drivers/net/phy/Kconfig | 2 +- drivers/net/phy/microchip_t1s.c | 66 ++++++++++++++++++++++++++++++++- 2 files changed, 66 insertions(+), 2 deletions(-)