diff mbox series

[3/3] arm64: dts: rockchip: add dts for Ariaboard Photonicat RK3568

Message ID 20240904111456.87089-4-bigfoot@classfun.cn (mailing list archive)
State New, archived
Headers show
Series Add support for Ariaboard Photonicat RK3568 | expand

Commit Message

Junhao Xie Sept. 4, 2024, 11:14 a.m. UTC
Add dts for Ariaboard Photonicat RK3568.

Working IO:
    Debug UART
    SDIO QCA9377 WiFi and Bluetooth
    M.2 E-Key PCIe WiFi and Bluetooth
    M.2 B-Key USB Modem WWAN
    Ethernet WAN Port
    MicroSD Card slot
    eMMC
    HDMI Output
    Mali GPU
    USB Type-A

Not working IO:
    Ethernet LAN Port (Lack of SGMII support)
    Power management MCU on UART4 (Driver pending)

Not working IO in MCU:
    Battery voltage sensor
    Board temperature sensor
    Hardware Power-off
    Hardware Watchdog
    Network status LED
    Real-time clock
    USB Charger voltage sensor

About onboard power management MCU:
    A heartbeat must be sent to the MCU within 60 seconds,
    otherwise the MCU will restart the system.
    When powering off, a shutdown command needs to be sent to the MCU.
    When the power button is long pressed, the MCU will send a shutdown
    command to the system. If the system does not shutdown within 60
    seconds, the power will be turned off directly.
    MCU only provides voltage for charger and battery.
    Manufacturer removed RK8xx PMIC.

Signed-off-by: Junhao Xie <bigfoot@classfun.cn>
---
 arch/arm64/boot/dts/rockchip/Makefile         |   1 +
 .../rockchip/rk3568-ariaboard-photonicat.dts  | 598 ++++++++++++++++++
 2 files changed, 599 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-ariaboard-photonicat.dts

Comments

Andrew Lunn Sept. 4, 2024, 5:25 p.m. UTC | #1
> +&gmac1 {
> +	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
> +	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
> +	assigned-clock-rates = <0>, <125000000>;
> +	clock_in_out = "output";
> +	phy-handle = <&rgmii_phy1>;
> +	phy-mode = "rgmii";
> +	phy-supply = <&vcc_3v3>;
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&gmac1m1_miim
> +		     &gmac1m1_tx_bus2
> +		     &gmac1m1_rx_bus2
> +		     &gmac1m1_rgmii_clk
> +		     &gmac1m1_rgmii_bus>;
> +	snps,reset-gpio = <&gpio4 RK_PC0 GPIO_ACTIVE_LOW>;
> +	snps,reset-active-low;
> +	snps,reset-delays-us = <0 20000 100000>;
> +	tx_delay = <0x38>;
> +	rx_delay = <0x15>;
> +	status = "okay";

This has been discussed a few times. You should be using phy-mode
rgmii-id.

arch/arm/boot/dts/rockchip/rk3288-phycore-som.dtsi is i think also a
YT8521SC.

	Andrew
Chukun Pan Sept. 5, 2024, 3:40 a.m. UTC | #2
Hi Junhao,

> ...
> --- /dev/null
> +++ b/arch/arm64/boot/dts/rockchip/rk3568-ariaboard-photonicat.dts

This should be 'rk3568-photonicat.dts',
e.g. "Radxa ROCK 3A" -> rk3568-rock-3a.dts

> ...
> +	model = "Ariaboard Photonicat RK3568";
> +	compatible = "ariaboard,photonicat", "rockchip,rk3568";

The official model name does not include 'RK3568'.

> ...
> +	firmware {
> +		optee: optee {
> +			compatible = "linaro,optee-tz";
> +			method = "smc";
> +		};
> +	};
> +
> ...
> +	reserved-memory {
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		ranges;
> +
> +		ramoops: ramoops@110000 {
> +			compatible = "ramoops";
> +			reg = <0 0x110000 0 0xf0000>;
> +			console-size = <0x80000>;
> +			ftrace-size = <0x00000>;
> +			pmsg-size = <0x50000>;
> +			record-size = <0x20000>;
> +		};
> +	};

Maybe these can be moved to rk356x.dtsi?

> ...
> +	vcca1v8: regulator-1v8-vcca {

schematics: VCCA_1V8

> ...
+	vcc3v3_pcie: regulator-3v3-vcc-pcie {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pcie_enable_h>;

schematics: pcie_pwren_h
vcc_syson -> vcc3v3_pi6c
vcc_syson -> vcc3v3_pcie

> +		regulator-always-on;
> +		regulator-boot-on;

No need.

> ...
> +	vcc5v0_sys: regulator-5v0-vcc-sys {

There is no vcc5v0_sys, but vcc_syson.

vcc_syson (5v) -> vcc3v3_sys
vcc_sysin (5v) - (mcu) -> vcc_syson
vccin_5v -> vcc_sysin

> ...
> +	vcc5v0_usb_host: regulator-5v0-vcc-usb-host {

schematics: VCC5V0_USB30_OTG0 and usb_host_pwren_h
It's a little weird, but that's what they're calling it.
Also: VCCIN_5V -> VCC5V0_USB30_OTG0

> ...
> +	vcc5v0_usb_modem: regulator-5v0-vcc-usb-modem {

Are you sure this regulator is 5v?

> ...
> +	vdda0v9: regulator-0v9-vdda {

schematics: VDDA_0V9

> +	wifi_pwrseq: wifi-pwrseq {
> +		compatible = "mmc-pwrseq-simple";
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&wifi_enable_h>;

schematics: wifi_reg_on_h
Also you need to enable the clk:

		clocks = <&pmucru CLK_RTC_32K>;
		clock-names = "ext_clock";
		pinctrl-names = "default";
		pinctrl-0 = <&wifi_reg_on_h &clk32k_out1>;

> +		post-power-on-delay-ms = <200>;
> +		reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
> +	};

> ...
> +&pcie30phy {
> +	phy-supply = <&vcc3v3_pcie>;

phy-supply = <&vcc3v3_pi6c>;

> ...
> +&pcie3x2 {
> +	max-link-speed = <1>;
> +	num-lanes = <1>;
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pcie30x2m1_pins>;

These are actually pcie30x1m0_pins.

> ...
> +&pmugrf {
> +	reboot-mode {

Maybe these can be moved to rk356x.dtsi?

> ...
> +&sdhci {

Missing mmc-hs200-1_8v;

> ...
> +&sdmmc0 {
> +	bus-width = <4>;
> +	cap-mmc-highspeed;

Why does sdcard need cap-mmc-highspeed?

> +	max-frequency = <150000000>;
> +	sd-uhs-sdr104;

The sdcard does not have 1.8v io voltage,
so this is wrong, please add no-1-8-v;

> +&sdmmc1 {
> +	bus-width = <4>;
> +	cap-sd-highspeed;
> +	cap-sdio-irq;
> +	disable-wp;

sdio wifi does not need disable-wp.

> +	qca_wifi: qca-wifi@1 {
> +		compatible = "qcom,ath10k";

ath10k does not need compatible.

> ...
> +&uart1 {
> ...
> +		clocks = <&pmucru CLK_RTC_32K>;
> +		enable-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&bt_enable_h>;

schematics: bt_reg_on_h
Missing clock-names = "lpo";
Junhao Xie Sept. 5, 2024, 5:47 a.m. UTC | #3
On 2024/9/5 01:25, Andrew Lunn wrote:
>> +&gmac1 {
>> +	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
>> +	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
>> +	assigned-clock-rates = <0>, <125000000>;
>> +	clock_in_out = "output";
>> +	phy-handle = <&rgmii_phy1>;
>> +	phy-mode = "rgmii";
>> +	phy-supply = <&vcc_3v3>;
>> +	pinctrl-names = "default";
>> +	pinctrl-0 = <&gmac1m1_miim
>> +		     &gmac1m1_tx_bus2
>> +		     &gmac1m1_rx_bus2
>> +		     &gmac1m1_rgmii_clk
>> +		     &gmac1m1_rgmii_bus>;
>> +	snps,reset-gpio = <&gpio4 RK_PC0 GPIO_ACTIVE_LOW>;
>> +	snps,reset-active-low;
>> +	snps,reset-delays-us = <0 20000 100000>;
>> +	tx_delay = <0x38>;
>> +	rx_delay = <0x15>;
>> +	status = "okay";
> 
> This has been discussed a few times. You should be using phy-mode
> rgmii-id.
> 
> arch/arm/boot/dts/rockchip/rk3288-phycore-som.dtsi is i think also a
> YT8521SC.
> 
> 	Andrew

Thanks, I changed phy-mode to rgmii-id and it seems to work fine.

Best regards,
Junhao
Junhao Xie Sept. 5, 2024, 9:17 a.m. UTC | #4
On 2024/9/5 11:40, Chukun Pan wrote:
> Hi Junhao,
> 
>> ...
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/rockchip/rk3568-ariaboard-photonicat.dts
> 
> This should be 'rk3568-photonicat.dts',
> e.g. "Radxa ROCK 3A" -> rk3568-rock-3a.dts
> 
>> ...
>> +	model = "Ariaboard Photonicat RK3568";
>> +	compatible = "ariaboard,photonicat", "rockchip,rk3568";
> 
> The official model name does not include 'RK3568'.

I will rename it.

> 
>> ...
>> +	firmware {
>> +		optee: optee {
>> +			compatible = "linaro,optee-tz";
>> +			method = "smc";
>> +		};
>> +	};
>> +
>> ...
>> +	reserved-memory {
>> +		#address-cells = <2>;
>> +		#size-cells = <2>;
>> +		ranges;
>> +
>> +		ramoops: ramoops@110000 {
>> +			compatible = "ramoops";
>> +			reg = <0 0x110000 0 0xf0000>;
>> +			console-size = <0x80000>;
>> +			ftrace-size = <0x00000>;
>> +			pmsg-size = <0x50000>;
>> +			record-size = <0x20000>;
>> +		};
>> +	};
> 
> Maybe these can be moved to rk356x.dtsi?

Yes, I will split them.

> 
>> ...
>> +	vcca1v8: regulator-1v8-vcca {
> 
> schematics: VCCA_1V8
> 
>> ...
> +	vcc3v3_pcie: regulator-3v3-vcc-pcie {
> +		compatible = "regulator-fixed";
> +		enable-active-high;
> +		gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pcie_enable_h>;
> 
> schematics: pcie_pwren_h
> vcc_syson -> vcc3v3_pi6c
> vcc_syson -> vcc3v3_pcie
> 
>> +		regulator-always-on;
>> +		regulator-boot-on;
> 
> No need.
> 
>> ...
>> +	vcc5v0_sys: regulator-5v0-vcc-sys {
> 
> There is no vcc5v0_sys, but vcc_syson.
> 
> vcc_syson (5v) -> vcc3v3_sys
> vcc_sysin (5v) - (mcu) -> vcc_syson
> vccin_5v -> vcc_sysin
> 
>> ...
>> +	vcc5v0_usb_host: regulator-5v0-vcc-usb-host {
> 
> schematics: VCC5V0_USB30_OTG0 and usb_host_pwren_h
> It's a little weird, but that's what they're calling it.
> Also: VCCIN_5V -> VCC5V0_USB30_OTG0
> 
>> ...
>> +	vcc5v0_usb_modem: regulator-5v0-vcc-usb-modem {
> 
> Are you sure this regulator is 5v?
> 

It should actually be 3.3V, I will fix it and rename to vcc3v3_usb_modem

> 
>> ...
>> +	vdda0v9: regulator-0v9-vdda {
> 
> schematics: VDDA_0V9
> 
>> +	wifi_pwrseq: wifi-pwrseq {
>> +		compatible = "mmc-pwrseq-simple";
>> +		pinctrl-names = "default";
>> +		pinctrl-0 = <&wifi_enable_h>;
> 
> schematics: wifi_reg_on_h
> Also you need to enable the clk:
> 
> 		clocks = <&pmucru CLK_RTC_32K>;
> 		clock-names = "ext_clock";
> 		pinctrl-names = "default";
> 		pinctrl-0 = <&wifi_reg_on_h &clk32k_out1>;
> 
>> +		post-power-on-delay-ms = <200>;
>> +		reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
>> +	};
> 
>> ...
>> +&pcie30phy {
>> +	phy-supply = <&vcc3v3_pcie>;
> 
> phy-supply = <&vcc3v3_pi6c>;

I will change it to vcc3v3_pi6c.
But there seems to be a warning here, maybe phy-supply is missing in rockchip,pcie3-phy.yaml?

/tmp/build/arch/arm64/boot/dts/rockchip/rk3568-photonicat.dtb: phy@fe8c0000: 'phy-supply' does not match any of the regexes: 'pinctrl-[0-9]+'
        from schema $id: http://devicetree.org/schemas/phy/rockchip,pcie3-phy.yaml#

> 
>> ...
>> +&pcie3x2 {
>> +	max-link-speed = <1>;
>> +	num-lanes = <1>;
>> +	pinctrl-names = "default";
>> +	pinctrl-0 = <&pcie30x2m1_pins>;
> 
> These are actually pcie30x1m0_pins.

pcie30x1m0_pins seems to conflict with sdmmc0, I changed it to pcie30x1m1_pins

> 
>> ...
>> +&pmugrf {
>> +	reboot-mode {
> 
> Maybe these can be moved to rk356x.dtsi?
> 
>> ...
>> +&sdhci {
> 
> Missing mmc-hs200-1_8v;
> 
[...]> 
> ath10k does not need compatible.

I will remove them

> 
>> ...
>> +&uart1 {
>> ...
>> +		clocks = <&pmucru CLK_RTC_32K>;
>> +		enable-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
>> +		pinctrl-names = "default";
>> +		pinctrl-0 = <&bt_enable_h>;
> 
> schematics: bt_reg_on_h
> Missing clock-names = "lpo";

When I add clocks-name, check_dtbs gives me a warning

/tmp/build/arch/arm64/boot/dts/rockchip/rk3568-photonicat.dtb: bluetooth: 'clock-names' does not match any of the regexes: 'pinctrl-[0-9]+'
        from schema $id: http://devicetree.org/schemas/net/bluetooth/qualcomm-bluetooth.yaml#

Maybe clock-name is missing in qualcomm-bluetooth.yaml?

> 

Thanks for your review, I will fix all problems in PATCH v2.

Best regards,
Junhao
Chukun Pan Sept. 5, 2024, 10:01 a.m. UTC | #5
Hi Junhao,

>>> +	vcc5v0_usb_modem: regulator-5v0-vcc-usb-modem {
>> 
>> Are you sure this regulator is 5v?
>> 
>
> It should actually be 3.3V, I will fix it and rename
> to vcc3v3_usb_modem

I prefer vcc3v3_rf or vcc3v3_ngff,
this is closer to the schematics.

>>> +	pinctrl-names = "default";
>>> +	pinctrl-0 = <&pcie30x2m1_pins>;
>> 
>> These are actually pcie30x1m0_pins.
>
> pcie30x1m0_pins seems to conflict with sdmmc0,
> I changed it to pcie30x1m1_pins

This is obviously incorrect. I didn't notice that
your pinctrl for sdmmc0 is wrong.
(Because the cd pin are different)
The sdmmc0 node should be like this:

&sdmmc0 {
	bus-width = <4>;
	cap-sd-highspeed;
	cd-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_LOW>;
	disable-wp;
	no-1-8-v;
	pinctrl-names = "default";
	pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd>;
	vmmc-supply = <&vcc3v3_sd>;
	vqmmc-supply = <&vcc_3v3>;
	status = "okay";
};
Junhao Xie Sept. 5, 2024, 11:06 a.m. UTC | #6
On 2024/9/5 18:01, Chukun Pan wrote:
> Hi Junhao,
> 
>>>> +	vcc5v0_usb_modem: regulator-5v0-vcc-usb-modem {
>>>
>>> Are you sure this regulator is 5v?
>>>
>>
>> It should actually be 3.3V, I will fix it and rename
>> to vcc3v3_usb_modem
> 
> I prefer vcc3v3_rf or vcc3v3_ngff,
> this is closer to the schematics.
> 

Yes, I changed it to vcc3v3_rf, this is the name used in the schematics.

>>>> +	pinctrl-names = "default";
>>>> +	pinctrl-0 = <&pcie30x2m1_pins>;
>>>
>>> These are actually pcie30x1m0_pins.
>>
>> pcie30x1m0_pins seems to conflict with sdmmc0,
>> I changed it to pcie30x1m1_pins
> 
> This is obviously incorrect. I didn't notice that
> your pinctrl for sdmmc0 is wrong.
> (Because the cd pin are different)

After fixing sdmmc0, using pcie30x1m0_pins can work normally.

Best regards,
Junhao
Junhao Xie Sept. 5, 2024, 11:17 a.m. UTC | #7
On 2024/9/5 01:25, Andrew Lunn wrote:
>> +&gmac1 {
[...]
> This has been discussed a few times. You should be using phy-mode
> rgmii-id.

After I changed phy-mode to rgmii-id, it seemed to work,
but it didn't transmit any data.
Maybe I made a mistake or should I continue to use phy-mode rgmii?

> arch/arm/boot/dts/rockchip/rk3288-phycore-som.dtsi is i think also a
> YT8521SC.

According to commit message and some pictures,
rk3288-phycore-som is using TI DP83867 PHY?

Best regards,
Junhao
Andrew Lunn Sept. 5, 2024, 12:53 p.m. UTC | #8
On Thu, Sep 05, 2024 at 07:17:03PM +0800, Junhao Xie wrote:
> On 2024/9/5 01:25, Andrew Lunn wrote:
> >> +&gmac1 {
> [...]
> > This has been discussed a few times. You should be using phy-mode
> > rgmii-id.
> 
> After I changed phy-mode to rgmii-id, it seemed to work,
> but it didn't transmit any data.
> Maybe I made a mistake or should I continue to use phy-mode rgmii?

How did you change the rx_delay and tx_delay?

In general, we want the PHY to add the delay, not the MAC. Most boards
in Linux do that. But boards using the motocomm PHY have got into a
cargo cult copy/paste of using the MAC to add the delays.

	Andrew
Junhao Xie Sept. 5, 2024, 6:01 p.m. UTC | #9
On 2024/9/5 20:53, Andrew Lunn wrote:
> On Thu, Sep 05, 2024 at 07:17:03PM +0800, Junhao Xie wrote:
>> On 2024/9/5 01:25, Andrew Lunn wrote:
>>>> +&gmac1 {
>> [...]
>>> This has been discussed a few times. You should be using phy-mode
>>> rgmii-id.
>>
>> After I changed phy-mode to rgmii-id, it seemed to work,
>> but it didn't transmit any data.
>> Maybe I made a mistake or should I continue to use phy-mode rgmii?
> 
> How did you change the rx_delay and tx_delay?
> 
> In general, we want the PHY to add the delay, not the MAC. Most boards
> in Linux do that. But boards using the motocomm PHY have got into a
> cargo cult copy/paste of using the MAC to add the delays.

I have tried rgmii-id with tx_delay/rx_delay 0x38/0x15, or 0x0/0x0,
or directly removed tx_delay/rx_delay, they all didn't transmit data.

I saw in dwmac-rk.c that when using rgmii-id, the tx_delay/rx_delay
properties in dt are ignored?

arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts also
uses YT8521. I added rx-internal-delay-ps and tx-internal-delay-ps
to rgmii_phy1 of mdio1 according to the prompts, and it now works
well using rgmii-id!

&mdio1 {
	rgmii_phy1: ethernet-phy@0 {
		compatible = "ethernet-phy-ieee802.3-c22";
		reg = <0x0>;
		rx-internal-delay-ps = <1500>;
		tx-internal-delay-ps = <1500>;
	};
};

&gmac1 {
	[...]
	phy-mode = "rgmii-id";
	[...]
	tx_delay = <0x0>;
	rx_delay = <0x0>;
	status = "okay";
	/* Motorcomm YT8521SC WAN port */
};

Best regards,
Junhao
Andrew Lunn Sept. 5, 2024, 6:20 p.m. UTC | #10
> arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts also
> uses YT8521. I added rx-internal-delay-ps and tx-internal-delay-ps
> to rgmii_phy1 of mdio1 according to the prompts, and it now works
> well using rgmii-id!
> 
> &mdio1 {
> 	rgmii_phy1: ethernet-phy@0 {
> 		compatible = "ethernet-phy-ieee802.3-c22";
> 		reg = <0x0>;
> 		rx-internal-delay-ps = <1500>;
> 		tx-internal-delay-ps = <1500>;
> 	};
> };
> 
> &gmac1 {
> 	[...]
> 	phy-mode = "rgmii-id";
> 	[...]
> 	tx_delay = <0x0>;
> 	rx_delay = <0x0>;
> 	status = "okay";
> 	/* Motorcomm YT8521SC WAN port */
> };

That looks O.K.

The YT8521SC seems to have issues with delays.
jh7100-starfive-visionfive-v1.dts says

/*
 * The board uses a Motorcomm YT8521 PHY supporting RGMII-ID, but requires
 * manual adjustment of the RX internal delay to work properly.  The default
 * RX delay provided by the driver (1.95ns) is too high, but applying a 50%
 * reduction seems to mitigate the issue.
 *
 * It is worth noting the adjustment is not necessary on BeagleV Starlight SBC,
 * which uses a Microchip PHY.  Hence, most likely the Motorcomm PHY is the one
 * responsible for the misbehaviour, not the GMAC.
 */

	Andrew
Chukun Pan Sept. 6, 2024, 3:50 a.m. UTC | #11
Hi Junhao,

> I have tried rgmii-id with tx_delay/rx_delay 0x38/0x15, or 0x0/0x0,
> or directly removed tx_delay/rx_delay, they all didn't transmit data.
>
> I saw in dwmac-rk.c that when using rgmii-id, the tx_delay/rx_delay
> properties in dt are ignored?

When using rgmii-id mode, tx_delay and rx_delay can be removed directly.
But you need to test whether the rx/tx-internal-delay-ps is appropriate.
Junhao Xie Sept. 6, 2024, 4:13 a.m. UTC | #12
On 2024/9/6 11:50, Chukun Pan wrote:
> Hi Junhao,
> 
>> I have tried rgmii-id with tx_delay/rx_delay 0x38/0x15, or 0x0/0x0,
>> or directly removed tx_delay/rx_delay, they all didn't transmit data.
>>
>> I saw in dwmac-rk.c that when using rgmii-id, the tx_delay/rx_delay
>> properties in dt are ignored?
> 
> When using rgmii-id mode, tx_delay and rx_delay can be removed directly.
> But you need to test whether the rx/tx-internal-delay-ps is appropriate.
> 

When tx_delay and rx_delay are removed, the driver prints some errors in kmsg.
Maybe we need to modify the driver?

Lines 1657 and 1668 of drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c:
 rk_gmac-dwmac fe010000.ethernet: Can not read property: tx_delay.
 rk_gmac-dwmac fe010000.ethernet: set tx_delay to 0x30
 rk_gmac-dwmac fe010000.ethernet: Can not read property: rx_delay.
 rk_gmac-dwmac fe010000.ethernet: set rx_delay to 0x10

After testing, rx/tx-internal-delay-ps 1500 seems stable:
$ ping 192.168.0.224
64 bytes from 192.168.0.224: icmp_seq=0 ttl=64 time=1.256 ms
64 bytes from 192.168.0.224: icmp_seq=1 ttl=64 time=1.146 ms
...
$ iperf3 -t 60 -c 192.168.0.224
Connecting to host 192.168.0.224, port 5201
[  4] local 192.168.0.101 port 59565 connected to 192.168.0.224 port 5201
[ ID] Interval           Transfer     Bandwidth
[  4]   0.00-1.00   sec   114 MBytes   956 Mbits/sec
...
[  4]  59.00-60.00  sec   112 MBytes   942 Mbits/sec
- - - - - - - - - - - - - - - - - - - - - - - - -
[ ID] Interval           Transfer     Bandwidth
[  4]   0.00-60.00  sec  6.58 GBytes   942 Mbits/sec                  sender
[  4]   0.00-60.00  sec  6.58 GBytes   942 Mbits/sec                  receiver

Best regards,
Junhao
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index fda1b980eb4b..9d92d084e996 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -103,6 +103,7 @@  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-soquartz-cm4.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-soquartz-model-a.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-box-demo.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-lubancat-1.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-ariaboard-photonicat.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bpi-r2-pro.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-fastrhino-r66s.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-ariaboard-photonicat.dts b/arch/arm64/boot/dts/rockchip/rk3568-ariaboard-photonicat.dts
new file mode 100644
index 000000000000..ab2bb14b8ed7
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3568-ariaboard-photonicat.dts
@@ -0,0 +1,598 @@ 
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/soc/rockchip,vop2.h>
+#include <dt-bindings/soc/rockchip,boot-mode.h>
+#include "rk3568.dtsi"
+
+/ {
+	model = "Ariaboard Photonicat RK3568";
+	compatible = "ariaboard,photonicat", "rockchip,rk3568";
+
+	aliases {
+		ethernet0 = &gmac0;
+		ethernet1 = &gmac1;
+		mmc0 = &sdhci;
+		mmc1 = &sdmmc0;
+		mmc2 = &sdmmc1;
+	};
+
+	battery: battery {
+		compatible = "simple-battery";
+		device-chemistry = "lithium-ion";
+		charge-full-design-microamp-hours = <6800000>;
+		energy-full-design-microwatt-hours = <25000000>;
+		voltage-max-design-microvolt = <4200000>;
+		voltage-min-design-microvolt = <3400000>;
+
+		ocv-capacity-celsius = <25>;
+		ocv-capacity-table-0 =  <4100000 100>, <4040000 90>,
+					<3980000 80>, <3920000 70>,
+					<3870000 60>, <3820000 50>,
+					<3790000 40>, <3770000 30>,
+					<3740000 20>, <3680000 10>,
+					<3450000 0>;
+	};
+
+	chosen: chosen {
+		stdout-path = "serial2:1500000n8";
+	};
+
+	firmware {
+		optee: optee {
+			compatible = "linaro,optee-tz";
+			method = "smc";
+		};
+	};
+
+	hdmi_con: hdmi-con {
+		compatible = "hdmi-connector";
+		type = "a";
+
+		port {
+			hdmi_con_in: endpoint {
+				remote-endpoint = <&hdmi_out_con>;
+			};
+		};
+	};
+
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		ramoops: ramoops@110000 {
+			compatible = "ramoops";
+			reg = <0 0x110000 0 0xf0000>;
+			console-size = <0x80000>;
+			ftrace-size = <0x00000>;
+			pmsg-size = <0x50000>;
+			record-size = <0x20000>;
+		};
+	};
+
+	rfkill-modem {
+		compatible = "rfkill-gpio";
+		label = "M.2 USB Modem";
+		radio-type = "wwan";
+		reset-gpios = <&gpio0 RK_PB0 GPIO_ACTIVE_LOW>;
+		shutdown-gpios = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>;
+	};
+
+	vcca1v8: regulator-1v8-vcca {
+		compatible = "regulator-fixed";
+		regulator-name = "vcca1v8";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vcc3v3_sys>;
+	};
+
+	vcc3v3_pcie: regulator-3v3-vcc-pcie {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pcie_enable_h>;
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-name = "vcc3v3_pcie";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vcc5v0_sys>;
+	};
+
+	vcc3v3_sd: regulator-3v3-vcc-sd {
+		compatible = "regulator-fixed";
+		gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&vcc_sd_h>;
+		regulator-boot-on;
+		regulator-name = "vcc3v3_sd";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vcc_3v3>;
+	};
+
+	vcc3v3_sys: regulator-3v3-vcc-sys {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc3v3_sys";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vcc5v0_sys>;
+	};
+
+	vcc5v0_sys: regulator-5v0-vcc-sys {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0_sys";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+	};
+
+	vcc5v0_usb_host: regulator-5v0-vcc-usb-host {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&vcc5v0_usb_host_en>;
+		regulator-name = "vcc5v0_usb_host";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&vcc5v0_sys>;
+	};
+
+	vcc5v0_usb_modem: regulator-5v0-vcc-usb-modem {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&vcc5v0_usb_modem_en>;
+		regulator-name = "vcc5v0_usb_modem";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&vcc5v0_sys>;
+	};
+
+	vcc_1v8: regulator-1v8-vcc {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_1v8";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vcc3v3_sys>;
+	};
+
+	vcc_3v3: regulator-3v3-vcc {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_3v3";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vcc3v3_sys>;
+	};
+
+	vdda0v9: regulator-0v9-vdda {
+		compatible = "regulator-fixed";
+		regulator-name = "vdda0v9";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <900000>;
+		regulator-max-microvolt = <900000>;
+		vin-supply = <&vcc3v3_sys>;
+	};
+
+	vdd_gpu: regulator-vdd-gpu {
+		compatible = "pwm-regulator";
+		pwms = <&pwm2 0 5000 1>;
+		pwm-supply = <&vcc5v0_sys>;
+		regulator-name = "vdd_gpu";
+		regulator-min-microvolt = <800000>;
+		regulator-max-microvolt = <1350000>;
+		regulator-ramp-delay = <6001>;
+		regulator-settling-time-up-us = <250>;
+	};
+
+	vdd_logic: regulator-vdd-logic {
+		compatible = "pwm-regulator";
+		pwms = <&pwm1 0 5000 1>;
+		pwm-supply = <&vcc5v0_sys>;
+		regulator-name = "vdd_logic";
+		regulator-min-microvolt = <500000>;
+		regulator-max-microvolt = <1350000>;
+		regulator-ramp-delay = <6001>;
+		regulator-settling-time-up-us = <250>;
+	};
+
+	wifi_pwrseq: wifi-pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		pinctrl-names = "default";
+		pinctrl-0 = <&wifi_enable_h>;
+		post-power-on-delay-ms = <200>;
+		reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
+	};
+};
+
+&combphy0 {
+	status = "okay";
+};
+
+&combphy1 {
+	status = "okay";
+};
+
+&combphy2 {
+	status = "okay";
+};
+
+&cpu0 {
+	cpu-supply = <&vdd_cpu>;
+};
+
+&cpu1 {
+	cpu-supply = <&vdd_cpu>;
+};
+
+&cpu2 {
+	cpu-supply = <&vdd_cpu>;
+};
+
+&cpu3 {
+	cpu-supply = <&vdd_cpu>;
+};
+
+&gmac0 {
+	status = "disabled";
+	/* Motoromm YT8521SC LAN port (require SGMII) */
+};
+
+&gmac1 {
+	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
+	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
+	assigned-clock-rates = <0>, <125000000>;
+	clock_in_out = "output";
+	phy-handle = <&rgmii_phy1>;
+	phy-mode = "rgmii";
+	phy-supply = <&vcc_3v3>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&gmac1m1_miim
+		     &gmac1m1_tx_bus2
+		     &gmac1m1_rx_bus2
+		     &gmac1m1_rgmii_clk
+		     &gmac1m1_rgmii_bus>;
+	snps,reset-gpio = <&gpio4 RK_PC0 GPIO_ACTIVE_LOW>;
+	snps,reset-active-low;
+	snps,reset-delays-us = <0 20000 100000>;
+	tx_delay = <0x38>;
+	rx_delay = <0x15>;
+	status = "okay";
+	/* Motoromm YT8521SC WAN port */
+};
+
+&gpu {
+	mali-supply = <&vdd_gpu>;
+	status = "okay";
+};
+
+&hdmi {
+	avdd-0v9-supply = <&vdda0v9>;
+	avdd-1v8-supply = <&vcca1v8>;
+	status = "okay";
+};
+
+&hdmi_in {
+	hdmi_in_vp0: endpoint {
+		remote-endpoint = <&vp0_out_hdmi>;
+	};
+};
+
+&hdmi_out {
+	hdmi_out_con: endpoint {
+		remote-endpoint = <&hdmi_con_in>;
+	};
+};
+
+&hdmi_sound {
+	status = "okay";
+};
+
+&i2c0 {
+	status = "okay";
+
+	vdd_cpu: regulator@1c {
+		compatible = "tcs,tcs4525";
+		reg = <0x1c>;
+		fcs,suspend-voltage-selector = <1>;
+		regulator-name = "vdd_cpu";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <800000>;
+		regulator-max-microvolt = <1150000>;
+		regulator-ramp-delay = <2300>;
+		vin-supply = <&vcc5v0_sys>;
+
+		regulator-state-mem {
+			regulator-off-in-suspend;
+		};
+	};
+};
+
+&i2c2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c2m1_xfer>;
+	status = "okay";
+};
+
+&i2s0_8ch {
+	status = "okay";
+};
+
+&mdio1 {
+	rgmii_phy1: ethernet-phy@0 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <0x0>;
+	};
+};
+
+&pcie30phy {
+	phy-supply = <&vcc3v3_pcie>;
+	status = "okay";
+};
+
+&pcie3x2 {
+	max-link-speed = <1>;
+	num-lanes = <1>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pcie30x2m1_pins>;
+	reset-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>;
+	vpcie3v3-supply = <&vcc3v3_pcie>;
+	status = "okay";
+	/* M.2 E-Key for PCIe WLAN */
+};
+
+&pinctrl {
+	bt {
+		bt_enable_h: bt-enable-h {
+			rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	pcie {
+		pcie_enable_h: pcie-enable-h {
+			rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	pmic {
+		pmic_int: pmic-int {
+			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	sdio-pwrseq {
+		wifi_enable_h: wifi-enable-h {
+			rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	usb2 {
+		vcc5v0_usb_host_en: vcc5v0-host-en {
+			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+
+		vcc5v0_usb_modem_en: vcc5v0-modem-en {
+			rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	vcc_sd {
+		vcc_sd_h: vcc-sd-h {
+			rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+};
+
+&pmu_io_domains {
+	pmuio1-supply = <&vcc_3v3>;
+	pmuio2-supply = <&vcc_3v3>;
+	vccio1-supply = <&vcc_3v3>;
+	vccio2-supply = <&vcc_1v8>;
+	vccio3-supply = <&vcc_3v3>;
+	vccio4-supply = <&vcc_1v8>;
+	vccio5-supply = <&vcc_3v3>;
+	vccio6-supply = <&vcc_3v3>;
+	vccio7-supply = <&vcc_3v3>;
+	status = "okay";
+};
+
+&pmugrf {
+	reboot-mode {
+		compatible = "syscon-reboot-mode";
+		offset = <0x200>;
+		mode-normal = <BOOT_NORMAL>;
+		mode-loader = <BOOT_BL_DOWNLOAD>;
+		mode-recovery = <BOOT_RECOVERY>;
+		mode-bootloader = <BOOT_FASTBOOT>;
+	};
+};
+
+&pwm1 {
+	status = "okay";
+};
+
+&pwm2 {
+	status = "okay";
+};
+
+&saradc {
+	vref-supply = <&vcca1v8>;
+	status = "okay";
+};
+
+&sdhci {
+	bus-width = <8>;
+	max-frequency = <200000000>;
+	non-removable;
+	pinctrl-names = "default";
+	pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd>;
+	vmmc-supply = <&vcc_3v3>;
+	vqmmc-supply = <&vcc_1v8>;
+	status = "okay";
+};
+
+&sdmmc0 {
+	bus-width = <4>;
+	cap-mmc-highspeed;
+	cap-sd-highspeed;
+	cd-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_LOW>;
+	disable-wp;
+	max-frequency = <150000000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
+	sd-uhs-sdr104;
+	vmmc-supply = <&vcc3v3_sd>;
+	vqmmc-supply = <&vcc_3v3>;
+	status = "okay";
+};
+
+&sdmmc1 {
+	bus-width = <4>;
+	cap-sd-highspeed;
+	cap-sdio-irq;
+	disable-wp;
+	keep-power-in-suspend;
+	max-frequency = <150000000>;
+	mmc-pwrseq = <&wifi_pwrseq>;
+	non-removable;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
+	sd-uhs-sdr104;
+	vmmc-supply = <&vcc3v3_sys>;
+	vqmmc-supply = <&vcc_1v8>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
+
+	qca_wifi: qca-wifi@1 {
+		compatible = "qcom,ath10k";
+		reg = <1>;
+	};
+};
+
+&tsadc {
+	rockchip,hw-tshut-mode = <1>;
+	rockchip,hw-tshut-polarity = <0>;
+	status = "okay";
+};
+
+&uart1 {
+	dma-names = "tx", "rx";
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
+	uart-has-rtscts;
+	status = "okay";
+
+	bluetooth: bluetooth {
+		compatible = "qcom,qca9377-bt";
+		clocks = <&pmucru CLK_RTC_32K>;
+		enable-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&bt_enable_h>;
+		vddio-supply = <&vcc_1v8>;
+	};
+};
+
+&uart2 {
+	status = "okay";
+};
+
+&uart4 {
+	dma-names = "tx", "rx";
+	status = "okay";
+	/* Onboard power management MCU */
+};
+
+&usb_host0_ohci {
+	status = "okay";
+};
+
+&usb_host0_ehci {
+	status = "okay";
+};
+
+&usb_host0_xhci {
+	dr_mode = "host";
+	status = "okay";
+	/* USB Type-A Port */
+};
+
+&usb_host1_ohci {
+	status = "okay";
+};
+
+&usb_host1_ehci {
+	status = "okay";
+};
+
+&usb_host1_xhci {
+	dr_mode = "host";
+	status = "okay";
+	/* M.2 B-Key for USB Modem WWAN */
+};
+
+&usb2phy0 {
+	status = "okay";
+};
+
+&usb2phy0_host {
+	phy-supply = <&vcc5v0_usb_modem>;
+	status = "okay";
+};
+
+&usb2phy0_otg {
+	phy-supply = <&vcc5v0_usb_host>;
+	status = "okay";
+};
+
+&usb2phy1 {
+	status = "okay";
+};
+
+&usb2phy1_host {
+	phy-supply = <&vcc5v0_usb_modem>;
+	status = "okay";
+};
+
+&usb2phy1_otg {
+	phy-supply = <&vcc5v0_usb_host>;
+	status = "okay";
+};
+
+&vop {
+	assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
+	assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
+	status = "okay";
+};
+
+&vop_mmu {
+	status = "okay";
+};
+
+&vp0 {
+	vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
+		reg = <ROCKCHIP_VOP2_EP_HDMI0>;
+		remote-endpoint = <&hdmi_in_vp0>;
+	};
+};