[v6,0/6] Introduce initial AMD I3C HCI driver support

Message

Shyam Sundar S K Aug. 29, 2024, 9:17 a.m. UTC

The AMD SoC includes an I3C IP block as part of the Fusion Controller Hub
(FCH). This series introduces the initial driver support to enable the I3C
IP block on AMD's latest processors.

Currently, the code is closely tied to dt-bindings. This initial set aims
to decouple some of these bindings by adding the MIPI ID, allowing the
current driver to support ACPI-enabled x86 systems.

It was discovered that the AMD I3C controller has several hardware issues,
including:
- Non-functional DMA mode (defaulting to PIO mode)
- Issues with Open-Drain (OD) and Push-Pull (PP) timing parameters
- Command response buffer threshold values

All of these issues have been addressed in this series.

v5->v6:
-------
 - Add Reviewed-by tag
 - Update to variable name from "pio_mode_support" to "mode_selector"
 
v4->v5:
-------
 - Add Andy & Jarkko's Reviewed-by tag
 - Handle major/minor number check for PIO MODE support.

v3->v4:
-------
 - use AMDI5017 as the _HID
 - use quirks bits within the .driver_data()
 - Add Reviewed-by tag

v2->v3:
-------
 - use MODULE_DEVICE_TABLE()
 - address comments from Jarkko
 - split version check and quirks into separate patches.
 
v1->v2:
-------
 - Address LKP reported problems
 - Guard boot_cpu_data usage with CONFIG_X86

Shyam Sundar S K (6):
  i3c: mipi-i3c-hci: Add AMDI5017 ACPI ID to the I3C Support List
  i3c: mipi-i3c-hci: Read HC_CONTROL_PIO_MODE only after i3c hci v1.1
  i3c: mipi-i3c-hci: Add a quirk to set PIO mode
  i3c: mipi-i3c-hci: Relocate helper macros to HCI header file
  i3c: mipi-i3c-hci: Add a quirk to set timing parameters
  i3c: mipi-i3c-hci: Add a quirk to set Response buffer threshold

 drivers/i3c/master/mipi-i3c-hci/Makefile     |  3 +-
 drivers/i3c/master/mipi-i3c-hci/core.c       | 36 ++++++++++++----
 drivers/i3c/master/mipi-i3c-hci/hci.h        | 10 +++++
 drivers/i3c/master/mipi-i3c-hci/hci_quirks.c | 44 ++++++++++++++++++++
 4 files changed, 83 insertions(+), 10 deletions(-)
 create mode 100644 drivers/i3c/master/mipi-i3c-hci/hci_quirks.c

Comments

Shyam Sundar S K Sept. 3, 2024, 7:41 p.m. UTC | #1

Hi Alexandre, Jarkko,

On 8/29/2024 14:47, Shyam Sundar S K wrote:
> The AMD SoC includes an I3C IP block as part of the Fusion Controller Hub
> (FCH). This series introduces the initial driver support to enable the I3C
> IP block on AMD's latest processors.
> 
> Currently, the code is closely tied to dt-bindings. This initial set aims
> to decouple some of these bindings by adding the MIPI ID, allowing the
> current driver to support ACPI-enabled x86 systems.
> 
> It was discovered that the AMD I3C controller has several hardware issues,
> including:
> - Non-functional DMA mode (defaulting to PIO mode)
> - Issues with Open-Drain (OD) and Push-Pull (PP) timing parameters
> - Command response buffer threshold values
> 
> All of these issues have been addressed in this series.
> 
> v5->v6:
> -------
>  - Add Reviewed-by tag
>  - Update to variable name from "pio_mode_support" to "mode_selector"


Can this series be applied as 6.12 material? (as it has the all the
tags now)

Thanks,
Shyam

Alexandre Belloni Sept. 5, 2024, 4:36 p.m. UTC | #2

On Thu, 29 Aug 2024 14:47:07 +0530, Shyam Sundar S K wrote:
> The AMD SoC includes an I3C IP block as part of the Fusion Controller Hub
> (FCH). This series introduces the initial driver support to enable the I3C
> IP block on AMD's latest processors.
> 
> Currently, the code is closely tied to dt-bindings. This initial set aims
> to decouple some of these bindings by adding the MIPI ID, allowing the
> current driver to support ACPI-enabled x86 systems.
> 
> [...]

Applied, thanks!

[1/6] i3c: mipi-i3c-hci: Add AMDI5017 ACPI ID to the I3C Support List
      https://git.kernel.org/abelloni/c/8d2e56ef83ce
[2/6] i3c: mipi-i3c-hci: Read HC_CONTROL_PIO_MODE only after i3c hci v1.1
      https://git.kernel.org/abelloni/c/039b23609ff2
[3/6] i3c: mipi-i3c-hci: Add a quirk to set PIO mode
      https://git.kernel.org/abelloni/c/014089329953
[4/6] i3c: mipi-i3c-hci: Relocate helper macros to HCI header file
      https://git.kernel.org/abelloni/c/216201b3d7df
[5/6] i3c: mipi-i3c-hci: Add a quirk to set timing parameters
      https://git.kernel.org/abelloni/c/46d4daa517e9
[6/6] i3c: mipi-i3c-hci: Add a quirk to set Response buffer threshold
      https://git.kernel.org/abelloni/c/ced86959d28c

Best regards,