diff mbox series

arm64: dts: imx8mp-venice*: enable NPU support

Message ID 20240909215359.780561-1-tharvey@gateworks.com (mailing list archive)
State New, archived
Headers show
Series arm64: dts: imx8mp-venice*: enable NPU support | expand

Commit Message

Tim Harvey Sept. 9, 2024, 9:53 p.m. UTC
The IMX8MP has a VeriSilicon (Vivante VIP8000) NPU which
is supported by the etnaviv driver. Enable it.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi | 4 ++++
 arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts  | 4 ++++
 2 files changed, 8 insertions(+)

Comments

Frieder Schrempf Sept. 10, 2024, 6:50 a.m. UTC | #1
Hi Tim,

On 09.09.24 11:53 PM, Tim Harvey wrote:
> The IMX8MP has a VeriSilicon (Vivante VIP8000) NPU which
> is supported by the etnaviv driver. Enable it.
> 
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> ---
>  arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi | 4 ++++
>  arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts  | 4 ++++
>  2 files changed, 8 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi
> index 6c75a5ecf56b..f0211a96855b 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi
> @@ -393,6 +393,10 @@ &i2c3 {
>  	status = "okay";
>  };
>  
> +&npu {
> +	status = "okay";
> +};
> +
>  /* off-board header */
>  &uart1 {
>  	pinctrl-names = "default";
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
> index 9885948952b4..8a04b66a4afc 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
> @@ -666,6 +666,10 @@ &i2c4 {
>  	status = "okay";
>  };
>  
> +&npu {
> +	status = "okay";
> +};
> +
>  &pcie_phy {
>  	fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
>  	fsl,clkreq-unsupported;

I think there is no need for this patch as the NPU is already enabled by
default in imx8mp.dtsi (same as the GPUs). Or do you disable it in some
intermediate devicetree include file?

Thanks
Frieder
Tim Harvey Sept. 10, 2024, 8:14 p.m. UTC | #2
On Mon, Sep 9, 2024 at 11:50 PM Frieder Schrempf
<frieder.schrempf@kontron.de> wrote:
>
> Hi Tim,
>
> On 09.09.24 11:53 PM, Tim Harvey wrote:
> > The IMX8MP has a VeriSilicon (Vivante VIP8000) NPU which
> > is supported by the etnaviv driver. Enable it.
> >
> > Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> > ---
> >  arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi | 4 ++++
> >  arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts  | 4 ++++
> >  2 files changed, 8 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi
> > index 6c75a5ecf56b..f0211a96855b 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi
> > @@ -393,6 +393,10 @@ &i2c3 {
> >       status = "okay";
> >  };
> >
> > +&npu {
> > +     status = "okay";
> > +};
> > +
> >  /* off-board header */
> >  &uart1 {
> >       pinctrl-names = "default";
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
> > index 9885948952b4..8a04b66a4afc 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
> > @@ -666,6 +666,10 @@ &i2c4 {
> >       status = "okay";
> >  };
> >
> > +&npu {
> > +     status = "okay";
> > +};
> > +
> >  &pcie_phy {
> >       fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
> >       fsl,clkreq-unsupported;
>
> I think there is no need for this patch as the NPU is already enabled by
> default in imx8mp.dtsi (same as the GPUs). Or do you disable it in some
> intermediate devicetree include file?
>

Frieder,

Thanks for pointing this out... you are correct. I'm not sure why I
thought it needed to be explicitly enabled.

Please ignore this patch.

Best Regards,

Tim
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi
index 6c75a5ecf56b..f0211a96855b 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi
@@ -393,6 +393,10 @@  &i2c3 {
 	status = "okay";
 };
 
+&npu {
+	status = "okay";
+};
+
 /* off-board header */
 &uart1 {
 	pinctrl-names = "default";
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
index 9885948952b4..8a04b66a4afc 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
@@ -666,6 +666,10 @@  &i2c4 {
 	status = "okay";
 };
 
+&npu {
+	status = "okay";
+};
+
 &pcie_phy {
 	fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
 	fsl,clkreq-unsupported;