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[v2,6/8] arm64: dts: mediatek: mt8188: Add SPMI support for PMIC control

Message ID 20240911105131.4094027-7-fshao@chromium.org (mailing list archive)
State New, archived
Headers show
Series Add platform supports to MediaTek MT8188 SoC | expand

Commit Message

Fei Shao Sept. 11, 2024, 10:51 a.m. UTC 
Add SPMI node for PMIC control on MT8188 SoC.

Signed-off-by: Fei Shao <fshao@chromium.org>
---

(no changes since v1)

 arch/arm64/boot/dts/mediatek/mt8188.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

Comments

AngeloGioacchino Del Regno Sept. 11, 2024, 11:24 a.m. UTC | #1 
Il 11/09/24 12:51, Fei Shao ha scritto:
> Add SPMI node for PMIC control on MT8188 SoC.
> 
> Signed-off-by: Fei Shao <fshao@chromium.org>
> ---
> 
> (no changes since v1)
> 
>   arch/arm64/boot/dts/mediatek/mt8188.dtsi | 12 ++++++++++++
>   1 file changed, 12 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8188.dtsi b/arch/arm64/boot/dts/mediatek/mt8188.dtsi
> index 61530f8c5599..32e5b7108f6a 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8188.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8188.dtsi
> @@ -1306,6 +1306,18 @@ pwrap: pwrap@10024000 {
>   			clock-names = "spi", "wrap";
>   		};
>   
> +		spmi: spmi@10027000 {
> +			compatible = "mediatek,mt8188-spmi", "mediatek,mt8195-spmi";
> +			reg = <0 0x10027000 0 0x000e00>, <0 0x10029000 0 0x000100>;

Please drop leading zeroes on iospace sizes 0xe00 and 0x100, after which:

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/mediatek/mt8188.dtsi b/arch/arm64/boot/dts/mediatek/mt8188.dtsi
index 61530f8c5599..32e5b7108f6a 100644
--- a/arch/arm64/boot/dts/mediatek/mt8188.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8188.dtsi
@@ -1306,6 +1306,18 @@  pwrap: pwrap@10024000 {
 			clock-names = "spi", "wrap";
 		};
 
+		spmi: spmi@10027000 {
+			compatible = "mediatek,mt8188-spmi", "mediatek,mt8195-spmi";
+			reg = <0 0x10027000 0 0x000e00>, <0 0x10029000 0 0x000100>;
+			reg-names = "pmif", "spmimst";
+			assigned-clocks = <&topckgen CLK_TOP_SPMI_M_MST>;
+			assigned-clock-parents = <&topckgen CLK_TOP_ULPOSC1_D10>;
+			clocks = <&infracfg_ao CLK_INFRA_AO_PMIC_AP>,
+				 <&infracfg_ao CLK_INFRA_AO_PMIC_TMR>,
+				 <&topckgen CLK_TOP_SPMI_M_MST>;
+			clock-names = "pmif_sys_ck", "pmif_tmr_ck", "spmimst_clk_mux";
+		};
+
 		infra_iommu: iommu@10315000 {
 			compatible = "mediatek,mt8188-iommu-infra";
 			reg = <0 0x10315000 0 0x1000>;