| Message ID | 20240913175625.3190757-2-ggiordano@phytec.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Reconfigure 1.4GHz in AM62 PHYCORE SoM | expand |
On 10:56-20240913, Garrett Giordano wrote: > The am625 is capable of running at 1.4 GHz when VDD_CORE is increased > from 0.75V to 0.85V. Here we add a 1.4 GHz node to the a53_opp_table and > increase the VDD_CORE voltage accordingly. The entire argument in introducing the 1.4Ghz overlay seems to have been to let users have the choice. What has changed since then? Ref: commit 7a5775a3da906dab059b8de60a2b88f6016cb4b8 btw, instead of putting a patch to delete the dtso, you should probably consider a revert patch instead. > > Signed-off-by: Garrett Giordano <ggiordano@phytec.com> > --- > arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi | 11 +++++++++-- > 1 file changed, 9 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi > index ac8959f3d953..8acbd4facf37 100644 > --- a/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi > @@ -205,6 +205,13 @@ AM62X_IOPAD(0x01f4, PIN_INPUT, 0) /* (D16) EXTINTn */ > }; > }; > > +&a53_opp_table { > + opp-1400000000 { > + opp-hz = /bits/ 64 <1400000000>; > + opp-supported-hw = <0x01 0x0004>; > + }; > +}; > + > &mcu_m4fss { > mboxes = <&mailbox0_cluster0 &mbox_m4_0>; > memory-region = <&mcu_m4fss_dma_memory_region>, > @@ -265,8 +272,8 @@ pmic@30 { > regulators { > vdd_core: buck1 { > regulator-name = "VDD_CORE"; > - regulator-min-microvolt = <750000>; > - regulator-max-microvolt = <750000>; > + regulator-min-microvolt = <850000>; > + regulator-max-microvolt = <850000>; > regulator-boot-on; > regulator-always-on; > }; > -- > 2.25.1 >
Hey Nishanth, On 9/13/24 11:09, Nishanth Menon wrote: > On 10:56-20240913, Garrett Giordano wrote: >> The am625 is capable of running at 1.4 GHz when VDD_CORE is increased >> from 0.75V to 0.85V. Here we add a 1.4 GHz node to the a53_opp_table and >> increase the VDD_CORE voltage accordingly. > The entire argument in introducing the 1.4Ghz overlay seems to have been > to let users have the choice. What has changed since then? I talked with the team and we came back with the following: - Our default PMIC configuration changed for 850000 uV / 1.4 GHz operations - All available users will receive a PCN on update with instructions towards 850000 uV / 1.4 GHz operations These changes make this overlay obsolete. > > Ref: commit 7a5775a3da906dab059b8de60a2b88f6016cb4b8 > > btw, instead of putting a patch to delete the dtso, you should > probably consider a revert patch instead. Thank you, I will send a v2 Monday reverting this patch instead. This will also address the Makefile edits. Regards, Garrett >> Signed-off-by: Garrett Giordano <ggiordano@phytec.com> >> --- >> arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi | 11 +++++++++-- >> 1 file changed, 9 insertions(+), 2 deletions(-) >> >> diff --git a/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi >> index ac8959f3d953..8acbd4facf37 100644 >> --- a/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi >> +++ b/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi >> @@ -205,6 +205,13 @@ AM62X_IOPAD(0x01f4, PIN_INPUT, 0) /* (D16) EXTINTn */ >> }; >> }; >> >> +&a53_opp_table { >> + opp-1400000000 { >> + opp-hz = /bits/ 64 <1400000000>; >> + opp-supported-hw = <0x01 0x0004>; >> + }; >> +}; >> + >> &mcu_m4fss { >> mboxes = <&mailbox0_cluster0 &mbox_m4_0>; >> memory-region = <&mcu_m4fss_dma_memory_region>, >> @@ -265,8 +272,8 @@ pmic@30 { >> regulators { >> vdd_core: buck1 { >> regulator-name = "VDD_CORE"; >> - regulator-min-microvolt = <750000>; >> - regulator-max-microvolt = <750000>; >> + regulator-min-microvolt = <850000>; >> + regulator-max-microvolt = <850000>; >> regulator-boot-on; >> regulator-always-on; >> }; >> -- >> 2.25.1 >> >
diff --git a/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi index ac8959f3d953..8acbd4facf37 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi @@ -205,6 +205,13 @@ AM62X_IOPAD(0x01f4, PIN_INPUT, 0) /* (D16) EXTINTn */ }; }; +&a53_opp_table { + opp-1400000000 { + opp-hz = /bits/ 64 <1400000000>; + opp-supported-hw = <0x01 0x0004>; + }; +}; + &mcu_m4fss { mboxes = <&mailbox0_cluster0 &mbox_m4_0>; memory-region = <&mcu_m4fss_dma_memory_region>, @@ -265,8 +272,8 @@ pmic@30 { regulators { vdd_core: buck1 { regulator-name = "VDD_CORE"; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; regulator-boot-on; regulator-always-on; };
The am625 is capable of running at 1.4 GHz when VDD_CORE is increased from 0.75V to 0.85V. Here we add a 1.4 GHz node to the a53_opp_table and increase the VDD_CORE voltage accordingly. Signed-off-by: Garrett Giordano <ggiordano@phytec.com> --- arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-)