Message ID | 20240911100813.338-6-quic_mukhopad@quicinc.com |
---|---|
State | Superseded |
Headers | show |
Series | Add support for DisplayPort on SA8775P platform | expand |
On Wed, Sep 11, 2024 at 03:38:13PM +0530, Soutrik Mukhopadhyay wrote: > The Qualcomm SA8775P platform comes with a DisplayPort controller > with a different base offset than the previous SoCs, > add support for this in the DisplayPort driver. > > Signed-off-by: Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com> > --- > drivers/gpu/drm/msm/dp/dp_display.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c > index e1228fb093ee..e4954fd99eb0 100644 > --- a/drivers/gpu/drm/msm/dp/dp_display.c > +++ b/drivers/gpu/drm/msm/dp/dp_display.c > @@ -118,6 +118,12 @@ struct msm_dp_desc { > bool wide_bus_supported; > }; > > +static const struct msm_dp_desc sa8775p_dp_descs[] = { > + { .io_start = 0xaf54000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, > + { .io_start = 0xaf5c000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true }, Why is this list incomplete? Regards, Bjorn > + {} > +}; > + > static const struct msm_dp_desc sc7180_dp_descs[] = { > { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, > {} > @@ -162,6 +168,7 @@ static const struct msm_dp_desc x1e80100_dp_descs[] = { > }; > > static const struct of_device_id dp_dt_match[] = { > + { .compatible = "qcom,sa8775p-dp", .data = &sa8775p_dp_descs }, > { .compatible = "qcom,sc7180-dp", .data = &sc7180_dp_descs }, > { .compatible = "qcom,sc7280-dp", .data = &sc7280_dp_descs }, > { .compatible = "qcom,sc7280-edp", .data = &sc7280_dp_descs }, > -- > 2.17.1 >
On 9/12/2024 1:32 AM, Bjorn Andersson wrote: > On Wed, Sep 11, 2024 at 03:38:13PM +0530, Soutrik Mukhopadhyay wrote: >> The Qualcomm SA8775P platform comes with a DisplayPort controller >> with a different base offset than the previous SoCs, >> add support for this in the DisplayPort driver. >> >> Signed-off-by: Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com> >> --- >> drivers/gpu/drm/msm/dp/dp_display.c | 7 +++++++ >> 1 file changed, 7 insertions(+) >> >> diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c >> index e1228fb093ee..e4954fd99eb0 100644 >> --- a/drivers/gpu/drm/msm/dp/dp_display.c >> +++ b/drivers/gpu/drm/msm/dp/dp_display.c >> @@ -118,6 +118,12 @@ struct msm_dp_desc { >> bool wide_bus_supported; >> }; >> >> +static const struct msm_dp_desc sa8775p_dp_descs[] = { >> + { .io_start = 0xaf54000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, >> + { .io_start = 0xaf5c000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true }, > Why is this list incomplete? > > Regards, > Bjorn Do you mean to add for mdss_1 as well? We only added dp controllers for mdss_0 as we plan to validate and enable only these. > >> + {} >> +}; >> + >> static const struct msm_dp_desc sc7180_dp_descs[] = { >> { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, >> {} >> @@ -162,6 +168,7 @@ static const struct msm_dp_desc x1e80100_dp_descs[] = { >> }; >> >> static const struct of_device_id dp_dt_match[] = { >> + { .compatible = "qcom,sa8775p-dp", .data = &sa8775p_dp_descs }, >> { .compatible = "qcom,sc7180-dp", .data = &sc7180_dp_descs }, >> { .compatible = "qcom,sc7280-dp", .data = &sc7280_dp_descs }, >> { .compatible = "qcom,sc7280-edp", .data = &sc7280_dp_descs }, >> -- >> 2.17.1 >>
On Thu, Sep 12, 2024 at 03:34:05PM +0530, Soutrik Mukhopadhyay wrote: > > On 9/12/2024 1:32 AM, Bjorn Andersson wrote: > > On Wed, Sep 11, 2024 at 03:38:13PM +0530, Soutrik Mukhopadhyay wrote: > > > The Qualcomm SA8775P platform comes with a DisplayPort controller > > > with a different base offset than the previous SoCs, > > > add support for this in the DisplayPort driver. Please check the line wrapping of this as well; the lines here should be wrapped at 75 columns. > > > > > > Signed-off-by: Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com> > > > --- > > > drivers/gpu/drm/msm/dp/dp_display.c | 7 +++++++ > > > 1 file changed, 7 insertions(+) > > > > > > diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c > > > index e1228fb093ee..e4954fd99eb0 100644 > > > --- a/drivers/gpu/drm/msm/dp/dp_display.c > > > +++ b/drivers/gpu/drm/msm/dp/dp_display.c > > > @@ -118,6 +118,12 @@ struct msm_dp_desc { > > > bool wide_bus_supported; > > > }; > > > +static const struct msm_dp_desc sa8775p_dp_descs[] = { > > > + { .io_start = 0xaf54000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, > > > + { .io_start = 0xaf5c000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true }, > > Why is this list incomplete? > > > > Regards, > > Bjorn > > > Do you mean to add for mdss_1 as well? > I don't see a reason for not submitting them as well. > We only added dp controllers for mdss_0 as we plan to validate and enable > only these. > As far as I can tell there are 5 DPTX blocks on mdss_0. It is perfectly fine that you just state in the commit message that "Only MDSS0 DPTX0 and DPTX1 have been validated", but please add the others as well in this commit. Regards, Bjorn > > > > > > + {} > > > +}; > > > + > > > static const struct msm_dp_desc sc7180_dp_descs[] = { > > > { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, > > > {} > > > @@ -162,6 +168,7 @@ static const struct msm_dp_desc x1e80100_dp_descs[] = { > > > }; > > > static const struct of_device_id dp_dt_match[] = { > > > + { .compatible = "qcom,sa8775p-dp", .data = &sa8775p_dp_descs }, > > > { .compatible = "qcom,sc7180-dp", .data = &sc7180_dp_descs }, > > > { .compatible = "qcom,sc7280-dp", .data = &sc7280_dp_descs }, > > > { .compatible = "qcom,sc7280-edp", .data = &sc7280_dp_descs }, > > > -- > > > 2.17.1 > > >
On 9/14/2024 2:54 AM, Bjorn Andersson wrote: > On Thu, Sep 12, 2024 at 03:34:05PM +0530, Soutrik Mukhopadhyay wrote: >> On 9/12/2024 1:32 AM, Bjorn Andersson wrote: >>> On Wed, Sep 11, 2024 at 03:38:13PM +0530, Soutrik Mukhopadhyay wrote: >>>> The Qualcomm SA8775P platform comes with a DisplayPort controller >>>> with a different base offset than the previous SoCs, >>>> add support for this in the DisplayPort driver. > Please check the line wrapping of this as well; the lines here should be > wrapped at 75 columns. Yes, it is within 75 columns, we ran checkpatch.pl before posting the patch. > >>>> Signed-off-by: Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com> >>>> --- >>>> drivers/gpu/drm/msm/dp/dp_display.c | 7 +++++++ >>>> 1 file changed, 7 insertions(+) >>>> >>>> diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c >>>> index e1228fb093ee..e4954fd99eb0 100644 >>>> --- a/drivers/gpu/drm/msm/dp/dp_display.c >>>> +++ b/drivers/gpu/drm/msm/dp/dp_display.c >>>> @@ -118,6 +118,12 @@ struct msm_dp_desc { >>>> bool wide_bus_supported; >>>> }; >>>> +static const struct msm_dp_desc sa8775p_dp_descs[] = { >>>> + { .io_start = 0xaf54000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, >>>> + { .io_start = 0xaf5c000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true }, >>> Why is this list incomplete? >>> >>> Regards, >>> Bjorn >> >> Do you mean to add for mdss_1 as well? >> > I don't see a reason for not submitting them as well. Sure, we will add for mdss_1 as well. > >> We only added dp controllers for mdss_0 as we plan to validate and enable >> only these. >> > As far as I can tell there are 5 DPTX blocks on mdss_0. > > > It is perfectly fine that you just state in the commit message that > "Only MDSS0 DPTX0 and DPTX1 have been validated", but please add the > others as well in this commit. > > Regards, > Bjorn We cross-checked the mdss architecture and found that there are only 2 dp controllers for each mdss. We will add all 4 and mention in the commit message that "Only MDSS0 DPTX0 and DPTX1 have been validated". > >>>> + {} >>>> +}; >>>> + >>>> static const struct msm_dp_desc sc7180_dp_descs[] = { >>>> { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, >>>> {} >>>> @@ -162,6 +168,7 @@ static const struct msm_dp_desc x1e80100_dp_descs[] = { >>>> }; >>>> static const struct of_device_id dp_dt_match[] = { >>>> + { .compatible = "qcom,sa8775p-dp", .data = &sa8775p_dp_descs }, >>>> { .compatible = "qcom,sc7180-dp", .data = &sc7180_dp_descs }, >>>> { .compatible = "qcom,sc7280-dp", .data = &sc7280_dp_descs }, >>>> { .compatible = "qcom,sc7280-edp", .data = &sc7280_dp_descs }, >>>> -- >>>> 2.17.1 >>>>
On 17.09.2024 10:12 AM, Soutrik Mukhopadhyay wrote: > > On 9/14/2024 2:54 AM, Bjorn Andersson wrote: >> On Thu, Sep 12, 2024 at 03:34:05PM +0530, Soutrik Mukhopadhyay wrote: >>> On 9/12/2024 1:32 AM, Bjorn Andersson wrote: >>>> On Wed, Sep 11, 2024 at 03:38:13PM +0530, Soutrik Mukhopadhyay wrote: >>>>> The Qualcomm SA8775P platform comes with a DisplayPort controller >>>>> with a different base offset than the previous SoCs, >>>>> add support for this in the DisplayPort driver. >> Please check the line wrapping of this as well; the lines here should be >> wrapped at 75 columns. [...] > > > We cross-checked the mdss architecture and found that there are only 2 dp controllers for each mdss. > > We will add all 4 and mention in the commit message that "Only MDSS0 DPTX0 and DPTX1 have been validated". Looking at some docs, it seems like 2x 2 controllers is indeed the correct config after all Konrad
diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c index e1228fb093ee..e4954fd99eb0 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -118,6 +118,12 @@ struct msm_dp_desc { bool wide_bus_supported; }; +static const struct msm_dp_desc sa8775p_dp_descs[] = { + { .io_start = 0xaf54000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, + { .io_start = 0xaf5c000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true }, + {} +}; + static const struct msm_dp_desc sc7180_dp_descs[] = { { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, {} @@ -162,6 +168,7 @@ static const struct msm_dp_desc x1e80100_dp_descs[] = { }; static const struct of_device_id dp_dt_match[] = { + { .compatible = "qcom,sa8775p-dp", .data = &sa8775p_dp_descs }, { .compatible = "qcom,sc7180-dp", .data = &sc7180_dp_descs }, { .compatible = "qcom,sc7280-dp", .data = &sc7280_dp_descs }, { .compatible = "qcom,sc7280-edp", .data = &sc7280_dp_descs },
The Qualcomm SA8775P platform comes with a DisplayPort controller with a different base offset than the previous SoCs, add support for this in the DisplayPort driver. Signed-off-by: Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com> --- drivers/gpu/drm/msm/dp/dp_display.c | 7 +++++++ 1 file changed, 7 insertions(+)