diff mbox series

[kvm-unit-tests,v4,1/3] riscv: Rewrite hartid_to_cpu in assembly

Message ID 20240915183459.52476-2-jamestiotio@gmail.com (mailing list archive)
State New
Headers show
Series riscv: sbi: Add support to test HSM extension | expand

Commit Message

James Raphael Tiovalen Sept. 15, 2024, 6:34 p.m. UTC
From: Andrew Jones <andrew.jones@linux.dev>

Some SBI HSM tests run without a stack being setup so they can't
run C code. Those tests still need to know the corresponding cpuid
for the hartid on which they are running. Give those tests
hartid_to_cpu() by reimplementing it in assembly.

Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
---
 lib/riscv/asm-offsets.c |  5 +++++
 lib/riscv/setup.c       | 10 ----------
 riscv/cstart.S          | 23 +++++++++++++++++++++++
 3 files changed, 28 insertions(+), 10 deletions(-)

Comments

Andrew Jones Sept. 16, 2024, 7:19 a.m. UTC | #1
On Mon, Sep 16, 2024 at 02:34:57AM GMT, James Raphael Tiovalen wrote:
> From: Andrew Jones <andrew.jones@linux.dev>
> 
> Some SBI HSM tests run without a stack being setup so they can't
> run C code. Those tests still need to know the corresponding cpuid
> for the hartid on which they are running. Give those tests
> hartid_to_cpu() by reimplementing it in assembly.
> 
> Signed-off-by: Andrew Jones <andrew.jones@linux.dev>

This should also include your sign-off since you're posting it and it's
for your series. Passing unmodified patches on that you're comfortable
passing on corresponds to (c) of [1]

[1] https://www.kernel.org/doc/html/v4.17/process/submitting-patches.html#developer-s-certificate-of-origin-1-1

> ---
>  lib/riscv/asm-offsets.c |  5 +++++
>  lib/riscv/setup.c       | 10 ----------
>  riscv/cstart.S          | 23 +++++++++++++++++++++++
>  3 files changed, 28 insertions(+), 10 deletions(-)
> 
> diff --git a/lib/riscv/asm-offsets.c b/lib/riscv/asm-offsets.c
> index a2a32438..6c511c14 100644
> --- a/lib/riscv/asm-offsets.c
> +++ b/lib/riscv/asm-offsets.c
> @@ -1,6 +1,7 @@
>  // SPDX-License-Identifier: GPL-2.0-only
>  #include <kbuild.h>
>  #include <elf.h>
> +#include <asm/processor.h>
>  #include <asm/ptrace.h>
>  #include <asm/smp.h>
>  
> @@ -58,5 +59,9 @@ int main(void)
>  	OFFSET(SECONDARY_FUNC, secondary_data, func);
>  	DEFINE(SECONDARY_DATA_SIZE, sizeof(struct secondary_data));
>  
> +	OFFSET(THREAD_INFO_CPU, thread_info, cpu);
> +	OFFSET(THREAD_INFO_HARTID, thread_info, hartid);
> +	DEFINE(THREAD_INFO_SIZE, sizeof(struct thread_info));
> +
>  	return 0;
>  }
> diff --git a/lib/riscv/setup.c b/lib/riscv/setup.c
> index 495db041..f347ad63 100644
> --- a/lib/riscv/setup.c
> +++ b/lib/riscv/setup.c
> @@ -43,16 +43,6 @@ uint64_t timebase_frequency;
>  
>  static struct mem_region riscv_mem_regions[NR_MEM_REGIONS + 1];
>  
> -int hartid_to_cpu(unsigned long hartid)
> -{
> -	int cpu;
> -
> -	for_each_present_cpu(cpu)
> -		if (cpus[cpu].hartid == hartid)
> -			return cpu;
> -	return -1;
> -}
> -
>  static void cpu_set_fdt(int fdtnode __unused, u64 regval, void *info __unused)
>  {
>  	int cpu = nr_cpus++;
> diff --git a/riscv/cstart.S b/riscv/cstart.S
> index 8f269997..6784d5e1 100644
> --- a/riscv/cstart.S
> +++ b/riscv/cstart.S
> @@ -109,6 +109,29 @@ halt:
>  1:	wfi
>  	j	1b
>  
> +/*
> + * hartid_to_cpu
> + *   a0 is a hartid on entry
> + * returns the corresponding cpuid in a0

I should have capitalized the 'r' in 'returns' and also written
"or -1 if no thread-info struct with 'hartid' is found."

> + */
> +.balign 4
> +.global hartid_to_cpu
> +hartid_to_cpu:
> +	la	t0, cpus
> +	la	t1, nr_cpus
> +	lw	t1, 0(t1)
> +	li	t2, 0
> +1:	bne	t2, t1, 2f
> +	li	a0, -1
> +	ret
> +2:	REG_L	t3, THREAD_INFO_HARTID(t0)
> +	bne	a0, t3, 3f
> +	lw	a0, THREAD_INFO_CPU(t0)
> +	ret
> +3:	addi	t0, t0, THREAD_INFO_SIZE
> +	addi	t2, t2, 1
> +	j	1b
> +
>  .balign 4
>  .global secondary_entry
>  secondary_entry:
> -- 
> 2.43.0
>

I'll fixup the comment and add your sign-off when applying.

Thanks,
drew
diff mbox series

Patch

diff --git a/lib/riscv/asm-offsets.c b/lib/riscv/asm-offsets.c
index a2a32438..6c511c14 100644
--- a/lib/riscv/asm-offsets.c
+++ b/lib/riscv/asm-offsets.c
@@ -1,6 +1,7 @@ 
 // SPDX-License-Identifier: GPL-2.0-only
 #include <kbuild.h>
 #include <elf.h>
+#include <asm/processor.h>
 #include <asm/ptrace.h>
 #include <asm/smp.h>
 
@@ -58,5 +59,9 @@  int main(void)
 	OFFSET(SECONDARY_FUNC, secondary_data, func);
 	DEFINE(SECONDARY_DATA_SIZE, sizeof(struct secondary_data));
 
+	OFFSET(THREAD_INFO_CPU, thread_info, cpu);
+	OFFSET(THREAD_INFO_HARTID, thread_info, hartid);
+	DEFINE(THREAD_INFO_SIZE, sizeof(struct thread_info));
+
 	return 0;
 }
diff --git a/lib/riscv/setup.c b/lib/riscv/setup.c
index 495db041..f347ad63 100644
--- a/lib/riscv/setup.c
+++ b/lib/riscv/setup.c
@@ -43,16 +43,6 @@  uint64_t timebase_frequency;
 
 static struct mem_region riscv_mem_regions[NR_MEM_REGIONS + 1];
 
-int hartid_to_cpu(unsigned long hartid)
-{
-	int cpu;
-
-	for_each_present_cpu(cpu)
-		if (cpus[cpu].hartid == hartid)
-			return cpu;
-	return -1;
-}
-
 static void cpu_set_fdt(int fdtnode __unused, u64 regval, void *info __unused)
 {
 	int cpu = nr_cpus++;
diff --git a/riscv/cstart.S b/riscv/cstart.S
index 8f269997..6784d5e1 100644
--- a/riscv/cstart.S
+++ b/riscv/cstart.S
@@ -109,6 +109,29 @@  halt:
 1:	wfi
 	j	1b
 
+/*
+ * hartid_to_cpu
+ *   a0 is a hartid on entry
+ * returns the corresponding cpuid in a0
+ */
+.balign 4
+.global hartid_to_cpu
+hartid_to_cpu:
+	la	t0, cpus
+	la	t1, nr_cpus
+	lw	t1, 0(t1)
+	li	t2, 0
+1:	bne	t2, t1, 2f
+	li	a0, -1
+	ret
+2:	REG_L	t3, THREAD_INFO_HARTID(t0)
+	bne	a0, t3, 3f
+	lw	a0, THREAD_INFO_CPU(t0)
+	ret
+3:	addi	t0, t0, THREAD_INFO_SIZE
+	addi	t2, t2, 1
+	j	1b
+
 .balign 4
 .global secondary_entry
 secondary_entry: