| Message ID | 20240926111449.9245-2-macpaul.lin@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2,1/5] arm64: dts: mt8195: Fix dtbs_check error for infracfg_ao node | expand |
On Thu, Sep 26, 2024 at 07:14:46PM +0800, Macpaul Lin wrote: > The infra-iommu node in mt8195.dtsi was triggering a CHECK_DTBS error due > to an excessively long 'interrupts' property. The error message was: > > infra-iommu@10315000: interrupts: [[0, 795, 4, 0], [0, 796, 4, 0], > [0, 797, 4, 0], [0, 798, 4, 0], [0, 799, 4, 0]] > is too long > > To address this issue, add "minItems: 1" and "maxItems: 5" constraints to > the 'interrupts' property in the DT binding schema. This change allows for > flexibility in the number of interrupts for new SoCs. > The purpose of these 5 interrupts is also added. > > Fixes: bca28426805d ("dt-bindings: iommu: mediatek: Convert IOMMU to DT schema") > Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com> > --- > .../bindings/iommu/mediatek,iommu.yaml | 25 ++++++++++++++++++- > 1 file changed, 24 insertions(+), 1 deletion(-) > > Changes for v2: > - commit message: re-formatting and add a description of adding 5 interrupts. > - add 'description' and 'maxItems: 5' for 'interrupt' property of > 'mt8195-iommu-infra' > - others keeps 'maxItems: 1' > > diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml > index ea6b0f5f24de..fdd2996d2a31 100644 > --- a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml > +++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml > @@ -96,7 +96,8 @@ properties: > maxItems: 1 > > interrupts: > - maxItems: 1 > + minItems: 1 > + maxItems: 5 > > clocks: > items: > @@ -210,6 +211,28 @@ allOf: > required: > - mediatek,larbs > > + - if: > + properties: > + compatible: > + contains: > + enum: > + - mediatek,mt8195-iommu-infra > + > + then: > + properties: > + interrupts: > + description: | > + The IOMMU of MT8195 has 5 banks: 0/1/2/3/4. > + Each bank has a set of APB registers corresponding to the > + normal world, protected world 1/2/3, and secure world, respectively. > + Therefore, 5 interrupt numbers are needed. > + maxItems: 5 You repeat here the constraint from the original definition. Should this be minitems: 5? > + > + else: > + properties: > + interrupts: > + maxItems: 1 > + > additionalProperties: false > > examples: > -- > 2.45.2 >
Il 26/09/24 13:14, Macpaul Lin ha scritto: > The infra-iommu node in mt8195.dtsi was triggering a CHECK_DTBS error due > to an excessively long 'interrupts' property. The error message was: > > infra-iommu@10315000: interrupts: [[0, 795, 4, 0], [0, 796, 4, 0], > [0, 797, 4, 0], [0, 798, 4, 0], [0, 799, 4, 0]] > is too long > > To address this issue, add "minItems: 1" and "maxItems: 5" constraints to > the 'interrupts' property in the DT binding schema. This change allows for > flexibility in the number of interrupts for new SoCs. > The purpose of these 5 interrupts is also added. > > Fixes: bca28426805d ("dt-bindings: iommu: mediatek: Convert IOMMU to DT schema") > Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com> > --- > .../bindings/iommu/mediatek,iommu.yaml | 25 ++++++++++++++++++- > 1 file changed, 24 insertions(+), 1 deletion(-) > > Changes for v2: > - commit message: re-formatting and add a description of adding 5 interrupts. > - add 'description' and 'maxItems: 5' for 'interrupt' property of > 'mt8195-iommu-infra' > - others keeps 'maxItems: 1' > > diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml > index ea6b0f5f24de..fdd2996d2a31 100644 > --- a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml > +++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml > @@ -96,7 +96,8 @@ properties: > maxItems: 1 > > interrupts: > - maxItems: 1 > + minItems: 1 > + maxItems: 5 > > clocks: > items: > @@ -210,6 +211,28 @@ allOf: > required: > - mediatek,larbs > > + - if: > + properties: > + compatible: > + contains: > + enum: > + - mediatek,mt8195-iommu-infra > + > + then: > + properties: > + interrupts: > + description: | Do you really need to keep the formatting? If you rephrase that as: The infra IOMMU in MT8195 has five banks: each features one set of APB registers for the normal world (set 0), one for the protected world (sets 1-3) and one for the secure world (set 4), and each set has its own interrupt. Therefore, five interrupts are needed. ...you won't need the bar :-) > + The IOMMU of MT8195 has 5 banks: 0/1/2/3/4. > + Each bank has a set of APB registers corresponding to the > + normal world, protected world 1/2/3, and secure world, respectively. > + Therefore, 5 interrupt numbers are needed. > + maxItems: 5 minItems: 5 Cheers, Angelo
On 9/30/24 16:49, AngeloGioacchino Del Regno wrote: > Il 26/09/24 13:14, Macpaul Lin ha scritto: >> The infra-iommu node in mt8195.dtsi was triggering a CHECK_DTBS error due >> to an excessively long 'interrupts' property. The error message was: >> [snip] >> >> diff --git >> a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml >> b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml >> index ea6b0f5f24de..fdd2996d2a31 100644 >> --- a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml >> +++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml >> @@ -96,7 +96,8 @@ properties: >> maxItems: 1 >> interrupts: >> - maxItems: 1 >> + minItems: 1 >> + maxItems: 5 >> clocks: >> items: >> @@ -210,6 +211,28 @@ allOf: >> required: >> - mediatek,larbs >> + - if: >> + properties: >> + compatible: >> + contains: >> + enum: >> + - mediatek,mt8195-iommu-infra >> + >> + then: >> + properties: >> + interrupts: >> + description: | > > Do you really need to keep the formatting? > > If you rephrase that as: > > The infra IOMMU in MT8195 has five banks: each features one set > of APB registers for the normal world (set 0), one Shouldn't we use a 'three' here? Three APB register sets for the protected world 1, protected world 2, and protected world 3. > for the protected > world (sets 1-3) and one for the secure world (set 4), and each set > has its own interrupt. Therefore, five interrupts are needed. > > ...you won't need the bar :-) Thanks for the suggestion. The description has been moved to top common property in v3, and v4, hence the bar is still required to explain the others SOCs. I'll try to rephrase the description for MT8195 also. >> + The IOMMU of MT8195 has 5 banks: 0/1/2/3/4. >> + Each bank has a set of APB registers corresponding to the >> + normal world, protected world 1/2/3, and secure world, >> respectively. >> + Therefore, 5 interrupt numbers are needed. >> + maxItems: 5 > > minItems: 5 > > Cheers, > Angelo > > Thanks Macpaul Lin
Il 02/10/24 07:01, Macpaul Lin ha scritto: > > > On 9/30/24 16:49, AngeloGioacchino Del Regno wrote: >> Il 26/09/24 13:14, Macpaul Lin ha scritto: >>> The infra-iommu node in mt8195.dtsi was triggering a CHECK_DTBS error due >>> to an excessively long 'interrupts' property. The error message was: >>> > > [snip] > >>> >>> diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml >>> b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml >>> index ea6b0f5f24de..fdd2996d2a31 100644 >>> --- a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml >>> +++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml >>> @@ -96,7 +96,8 @@ properties: >>> maxItems: 1 >>> interrupts: >>> - maxItems: 1 >>> + minItems: 1 >>> + maxItems: 5 >>> clocks: >>> items: >>> @@ -210,6 +211,28 @@ allOf: >>> required: >>> - mediatek,larbs >>> + - if: >>> + properties: >>> + compatible: >>> + contains: >>> + enum: >>> + - mediatek,mt8195-iommu-infra >>> + >>> + then: >>> + properties: >>> + interrupts: >>> + description: | >> >> Do you really need to keep the formatting? >> >> If you rephrase that as: >> >> The infra IOMMU in MT8195 has five banks: each features one set >> of APB registers for the normal world (set 0), one > > Shouldn't we use a 'three' here? Oops, yes, that's three. I wrote 'one' but described three. Heh! > Three APB register sets for the protected world 1, protected world 2, > and protected world 3. three APB register sets for the protected world (sets 1/2/3) -- or three APB register sets for the protected world (sets 1-3) I mean, repeating "protected world X" three times is too much I think :-) > >> for the protected >> world (sets 1-3) and one for the secure world (set 4), and each set >> has its own interrupt. Therefore, five interrupts are needed. >> >> ...you won't need the bar :-) > > Thanks for the suggestion. The description has been moved to > top common property in v3, and v4, > hence the bar is still required to explain the > others SOCs. I'll try to rephrase the description for MT8195 also. Sure. You're welcome! > >>> + The IOMMU of MT8195 has 5 banks: 0/1/2/3/4. >>> + Each bank has a set of APB registers corresponding to the >>> + normal world, protected world 1/2/3, and secure world, respectively. >>> + Therefore, 5 interrupt numbers are needed. >>> + maxItems: 5 >> >> minItems: 5 >> >> Cheers, >> Angelo >> >> > > Thanks > Macpaul Lin
diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml index ea6b0f5f24de..fdd2996d2a31 100644 --- a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml +++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml @@ -96,7 +96,8 @@ properties: maxItems: 1 interrupts: - maxItems: 1 + minItems: 1 + maxItems: 5 clocks: items: @@ -210,6 +211,28 @@ allOf: required: - mediatek,larbs + - if: + properties: + compatible: + contains: + enum: + - mediatek,mt8195-iommu-infra + + then: + properties: + interrupts: + description: | + The IOMMU of MT8195 has 5 banks: 0/1/2/3/4. + Each bank has a set of APB registers corresponding to the + normal world, protected world 1/2/3, and secure world, respectively. + Therefore, 5 interrupt numbers are needed. + maxItems: 5 + + else: + properties: + interrupts: + maxItems: 1 + additionalProperties: false examples:
The infra-iommu node in mt8195.dtsi was triggering a CHECK_DTBS error due to an excessively long 'interrupts' property. The error message was: infra-iommu@10315000: interrupts: [[0, 795, 4, 0], [0, 796, 4, 0], [0, 797, 4, 0], [0, 798, 4, 0], [0, 799, 4, 0]] is too long To address this issue, add "minItems: 1" and "maxItems: 5" constraints to the 'interrupts' property in the DT binding schema. This change allows for flexibility in the number of interrupts for new SoCs. The purpose of these 5 interrupts is also added. Fixes: bca28426805d ("dt-bindings: iommu: mediatek: Convert IOMMU to DT schema") Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com> --- .../bindings/iommu/mediatek,iommu.yaml | 25 ++++++++++++++++++- 1 file changed, 24 insertions(+), 1 deletion(-) Changes for v2: - commit message: re-formatting and add a description of adding 5 interrupts. - add 'description' and 'maxItems: 5' for 'interrupt' property of 'mt8195-iommu-infra' - others keeps 'maxItems: 1'