| Message ID | 20240928083804.1073942-2-dario.binacchi@amarulasolutions.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Support spread spectrum clocking for i.MX8{M,N,P} PLLs | expand |
On 28/09/2024 10:37, Dario Binacchi wrote: > The patch adds the DT bindings for enabling and tuning spread spectrum > clocking generation. > > Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> > --- > > .../bindings/clock/fsl,imx8m-anatop.yaml | 41 +++++++++++++++++++ > 1 file changed, 41 insertions(+) > > diff --git a/Documentation/devicetree/bindings/clock/fsl,imx8m-anatop.yaml b/Documentation/devicetree/bindings/clock/fsl,imx8m-anatop.yaml > index bbd22e95b319..c91eb4229ed3 100644 > --- a/Documentation/devicetree/bindings/clock/fsl,imx8m-anatop.yaml > +++ b/Documentation/devicetree/bindings/clock/fsl,imx8m-anatop.yaml > @@ -32,6 +32,47 @@ properties: > > '#clock-cells': > const: 1 > +if: This should be allOf: and placed after required: block, like in example schema. > + properties: > + compatible: > + contains: > + enum: > + - fsl,imx8mm-anatop > + > +then: > + properties: > + fsl,ssc-clocks: Nope. Properties must be defined in top-level. > + $ref: /schemas/types.yaml#/definitions/phandle-array > + description: > + The phandles to the PLLs with spread spectrum clock generation > + hardware capability. These should be clocks. > + maxItems: 4 > + > + fsl,ssc-modfreq-hz: > + $ref: /schemas/types.yaml#/definitions/uint32-array This should fail. I don't think you tested this patch. https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/property-units.yaml > + description: > + The values of modulation frequency (Hz unit) of spread spectrum > + clocking for each PLL. > + maxItems: 4 > + > + fsl,ssc-modrate-percent: Same problems Best regards, Krzysztof
On Sat, Sep 28, 2024 at 2:09 PM Krzysztof Kozlowski <krzk@kernel.org> wrote: > > On 28/09/2024 10:37, Dario Binacchi wrote: > > The patch adds the DT bindings for enabling and tuning spread spectrum > > clocking generation. > > > > Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> > > --- > > > > .../bindings/clock/fsl,imx8m-anatop.yaml | 41 +++++++++++++++++++ > > 1 file changed, 41 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/clock/fsl,imx8m-anatop.yaml b/Documentation/devicetree/bindings/clock/fsl,imx8m-anatop.yaml > > index bbd22e95b319..c91eb4229ed3 100644 > > --- a/Documentation/devicetree/bindings/clock/fsl,imx8m-anatop.yaml > > +++ b/Documentation/devicetree/bindings/clock/fsl,imx8m-anatop.yaml > > @@ -32,6 +32,47 @@ properties: > > > > '#clock-cells': > > const: 1 > > +if: > > This should be allOf: and placed after required: block, like in example > schema. > > > > + properties: > > + compatible: > > + contains: > > + enum: > > + - fsl,imx8mm-anatop > > + > > +then: > > + properties: > > + fsl,ssc-clocks: > > Nope. Properties must be defined in top-level. > > > + $ref: /schemas/types.yaml#/definitions/phandle-array > > + description: > > + The phandles to the PLLs with spread spectrum clock generation > > + hardware capability. > > These should be clocks. Sorry, but I can't understand what you're asking me. Could you kindly explain it to me in more detail? > > > + maxItems: 4 > > + > > + fsl,ssc-modfreq-hz: > > + $ref: /schemas/types.yaml#/definitions/uint32-array > > This should fail. I don't think you tested this patch. I executed the command make dt_binding_check DT_SCHEMA_FILES=fsl,imx8m-anatop.yaml and it did not raise any errors. Thanks and regards, Dario > > https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/property-units.yaml > > > + description: > > + The values of modulation frequency (Hz unit) of spread spectrum > > + clocking for each PLL. > > + maxItems: 4 > > + > > + fsl,ssc-modrate-percent: > > Same problems > > > > Best regards, > Krzysztof >
On 29/09/2024 22:00, Dario Binacchi wrote: >> >> >>> + properties: >>> + compatible: >>> + contains: >>> + enum: >>> + - fsl,imx8mm-anatop >>> + >>> +then: >>> + properties: >>> + fsl,ssc-clocks: >> >> Nope. Properties must be defined in top-level. >> >>> + $ref: /schemas/types.yaml#/definitions/phandle-array >>> + description: >>> + The phandles to the PLLs with spread spectrum clock generation >>> + hardware capability. >> >> These should be clocks. > > Sorry, but I can't understand what you're asking me. > Could you kindly explain it to me in more detail? You added new property instead of using existing one for this purpose: 'clocks'. Best regards, Krzysztof
On Mon, Sep 30, 2024 at 8:45 AM Krzysztof Kozlowski <krzk@kernel.org> wrote: > > On 29/09/2024 22:00, Dario Binacchi wrote: > >> > >> > >>> + properties: > >>> + compatible: > >>> + contains: > >>> + enum: > >>> + - fsl,imx8mm-anatop > >>> + > >>> +then: > >>> + properties: > >>> + fsl,ssc-clocks: > >> > >> Nope. Properties must be defined in top-level. > >> > >>> + $ref: /schemas/types.yaml#/definitions/phandle-array > >>> + description: > >>> + The phandles to the PLLs with spread spectrum clock generation > >>> + hardware capability. > >> > >> These should be clocks. > > > > Sorry, but I can't understand what you're asking me. > > Could you kindly explain it to me in more detail? > > You added new property instead of using existing one for this purpose: > 'clocks'. > > > > Best regards, > Krzysztof > I added this new property specifically for managing spread-spectrum. Indeed, not all clocks/PLLs managed by the node/peripheral support spread-spectrum, and the added properties specify parameters for enabling and tuning SSC for each individual PLL based on the index of each list. If I were to use the 'clocks' property and add a clock to this list that does not support SSC, IMHO the pairings would be less clear. AFAIK the confusion arises from the fact that this node, which is a clock controller, was used only to export its base address, but perhaps it should have also exported its clocks, which the other clock controller does, as shown in: Documentation/devicetree/bindings/clock/imx8m-clock.yaml. If I consider its 'compatible' entries: - 'fsl,imx8mm-ccm' -> drivers/clk/imx/clk-imx8mm.c - 'fsl,imx8mn-ccm' -> drivers/clk/imx/clk-imx8mn.c - 'fsl,imx8mp-ccm' -> drivers/clk/imx/clk-imx8mp.c the probe function, triggered by fsl,imx8m{m,n,p}-ccm (and not fsl,imx8m{m,n,p}-anatop), retrieves the anatop node solely to get its base address, also registering its clocks, which I would have expected to be registered by another driver, specifically the one for anatop: static int imx8mn_clocks_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct device_node *np = dev->of_node; void __iomem *base; struct imx_pll14xx_ssc pll1443x_ssc; int ret; clk_hw_data = devm_kzalloc(dev, struct_size(clk_hw_data, hws, IMX8MN_CLK_END), GFP_KERNEL); if (WARN_ON(!clk_hw_data)) return -ENOMEM; clk_hw_data->num = IMX8MN_CLK_END; hws = clk_hw_data->hws; hws[IMX8MN_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0); hws[IMX8MN_CLK_24M] = imx_get_clk_hw_by_name(np, "osc_24m"); hws[IMX8MN_CLK_32K] = imx_get_clk_hw_by_name(np, "osc_32k"); hws[IMX8MN_CLK_EXT1] = imx_get_clk_hw_by_name(np, "clk_ext1"); hws[IMX8MN_CLK_EXT2] = imx_get_clk_hw_by_name(np, "clk_ext2"); hws[IMX8MN_CLK_EXT3] = imx_get_clk_hw_by_name(np, "clk_ext3"); hws[IMX8MN_CLK_EXT4] = imx_get_clk_hw_by_name(np, "clk_ext4"); np = of_find_compatible_node(NULL, NULL, "fsl,imx8mn-anatop"); base = devm_of_iomap(dev, np, 0, NULL); of_node_put(np); if (WARN_ON(IS_ERR(base))) { ret = PTR_ERR(base); goto unregister_hws; } hws[IMX8MN_AUDIO_PLL1_REF_SEL] = imx_clk_hw_mux("audio_pll1_ref_sel", base + 0x0, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels)); hws[IMX8MN_AUDIO_PLL2_REF_SEL] = imx_clk_hw_mux("audio_pll2_ref_sel", base + 0x14, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels)); hws[IMX8MN_VIDEO_PLL_REF_SEL] = imx_clk_hw_mux("video_pll_ref_sel", base + 0x28, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels)); Thanks and regards, Dario
On 01/10/2024 08:29, Dario Binacchi wrote: > On Mon, Sep 30, 2024 at 8:45 AM Krzysztof Kozlowski <krzk@kernel.org> wrote: >> >> On 29/09/2024 22:00, Dario Binacchi wrote: >>>> >>>> >>>>> + properties: >>>>> + compatible: >>>>> + contains: >>>>> + enum: >>>>> + - fsl,imx8mm-anatop >>>>> + >>>>> +then: >>>>> + properties: >>>>> + fsl,ssc-clocks: >>>> >>>> Nope. Properties must be defined in top-level. >>>> >>>>> + $ref: /schemas/types.yaml#/definitions/phandle-array >>>>> + description: >>>>> + The phandles to the PLLs with spread spectrum clock generation >>>>> + hardware capability. >>>> >>>> These should be clocks. >>> >>> Sorry, but I can't understand what you're asking me. >>> Could you kindly explain it to me in more detail? >> >> You added new property instead of using existing one for this purpose: >> 'clocks'. > >> >> >> >> Best regards, >> Krzysztof >> > > I added this new property specifically for managing spread-spectrum. > Indeed, not all clocks/PLLs > managed by the node/peripheral support spread-spectrum, and the added > properties specify > parameters for enabling and tuning SSC for each individual PLL based > on the index of each list. > If I were to use the 'clocks' property and add a clock to this list > that does not support SSC, IMHO > the pairings would be less clear. You duplicate property with argument "pairings shall match". Well, I am not happy with the duplication. Clocks have specific order, thus it is explicit which one needs tuning. Your other properties can match them as well, just index from clocks is offset... > > AFAIK the confusion arises from the fact that this node, which is a > clock controller, was used only > to export its base address, but perhaps it should have also exported > its clocks, which the other > clock controller does, as shown in: > Documentation/devicetree/bindings/clock/imx8m-clock.yaml. You use it as clocks, so I don't understand this comment. > If I consider its 'compatible' entries: > - 'fsl,imx8mm-ccm' -> drivers/clk/imx/clk-imx8mm.c > - 'fsl,imx8mn-ccm' -> drivers/clk/imx/clk-imx8mn.c > - 'fsl,imx8mp-ccm' -> drivers/clk/imx/clk-imx8mp.c > the probe function, triggered by fsl,imx8m{m,n,p}-ccm (and not > fsl,imx8m{m,n,p}-anatop), > retrieves the anatop node solely to get its base address, also > registering its clocks, which > I would have expected to be registered by another driver, specifically > the one for anatop: > > static int imx8mn_clocks_probe(struct platform_device *pdev) > { > struct device *dev = &pdev->dev; > struct device_node *np = dev->of_node; > void __iomem *base; > struct imx_pll14xx_ssc pll1443x_ssc; > int ret; > > clk_hw_data = devm_kzalloc(dev, struct_size(clk_hw_data, hws, > IMX8MN_CLK_END), GFP_KERNEL); > if (WARN_ON(!clk_hw_data)) > return -ENOMEM; > > clk_hw_data->num = IMX8MN_CLK_END; > hws = clk_hw_data->hws; > > hws[IMX8MN_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0); > hws[IMX8MN_CLK_24M] = imx_get_clk_hw_by_name(np, "osc_24m"); > hws[IMX8MN_CLK_32K] = imx_get_clk_hw_by_name(np, "osc_32k"); > hws[IMX8MN_CLK_EXT1] = imx_get_clk_hw_by_name(np, "clk_ext1"); > hws[IMX8MN_CLK_EXT2] = imx_get_clk_hw_by_name(np, "clk_ext2"); > hws[IMX8MN_CLK_EXT3] = imx_get_clk_hw_by_name(np, "clk_ext3"); > hws[IMX8MN_CLK_EXT4] = imx_get_clk_hw_by_name(np, "clk_ext4"); > > np = of_find_compatible_node(NULL, NULL, "fsl,imx8mn-anatop"); > base = devm_of_iomap(dev, np, 0, NULL); > of_node_put(np); > if (WARN_ON(IS_ERR(base))) { > ret = PTR_ERR(base); > goto unregister_hws; > } > > hws[IMX8MN_AUDIO_PLL1_REF_SEL] = imx_clk_hw_mux("audio_pll1_ref_sel", > base + 0x0, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels)); > hws[IMX8MN_AUDIO_PLL2_REF_SEL] = imx_clk_hw_mux("audio_pll2_ref_sel", > base + 0x14, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels)); > hws[IMX8MN_VIDEO_PLL_REF_SEL] = imx_clk_hw_mux("video_pll_ref_sel", > base + 0x28, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels)); Sorry, I am not going to dwell into drivers code. We talk here about bindings and new properties. Best regards, Krzysztof
On Thu, Oct 3, 2024 at 12:46 PM Krzysztof Kozlowski <krzk@kernel.org> wrote: > > On 01/10/2024 08:29, Dario Binacchi wrote: > > On Mon, Sep 30, 2024 at 8:45 AM Krzysztof Kozlowski <krzk@kernel.org> wrote: > >> > >> On 29/09/2024 22:00, Dario Binacchi wrote: > >>>> > >>>> > >>>>> + properties: > >>>>> + compatible: > >>>>> + contains: > >>>>> + enum: > >>>>> + - fsl,imx8mm-anatop > >>>>> + > >>>>> +then: > >>>>> + properties: > >>>>> + fsl,ssc-clocks: > >>>> > >>>> Nope. Properties must be defined in top-level. > >>>> > >>>>> + $ref: /schemas/types.yaml#/definitions/phandle-array > >>>>> + description: > >>>>> + The phandles to the PLLs with spread spectrum clock generation > >>>>> + hardware capability. > >>>> > >>>> These should be clocks. > >>> > >>> Sorry, but I can't understand what you're asking me. > >>> Could you kindly explain it to me in more detail? > >> > >> You added new property instead of using existing one for this purpose: > >> 'clocks'. > > > >> > >> > >> > >> Best regards, > >> Krzysztof > >> > > > > I added this new property specifically for managing spread-spectrum. > > Indeed, not all clocks/PLLs > > managed by the node/peripheral support spread-spectrum, and the added > > properties specify > > parameters for enabling and tuning SSC for each individual PLL based > > on the index of each list. > > If I were to use the 'clocks' property and add a clock to this list > > that does not support SSC, IMHO > > the pairings would be less clear. > > You duplicate property with argument "pairings shall match". Well, I am > not happy with the duplication. Clocks have specific order, thus it is > explicit which one needs tuning. Your other properties can match them as > well, just index from clocks is offset... Just to check if I understood correctly what you are suggesting before submitting version 3 of the patch. Something, for example, like: clocks = <&clk, IMX8MP_AUDIO_PLL1>, <&clk, IMX8MP_AUDIO_PLL2>, <&clk IMX8MP_VIDEO_PLL1>; fsl,ssc-modfreq-hz = <0, 3517>, <2, 6818>; Where the spread spectrum is enabled only for AUDIO_PLL1 and VIDEO_PLL1 and not for IMX8MP_AUDIO_PLL2. Is this what you meant? Thanks and regards, Dario > > > > > > AFAIK the confusion arises from the fact that this node, which is a > > clock controller, was used only > > to export its base address, but perhaps it should have also exported > > its clocks, which the other > > clock controller does, as shown in: > > Documentation/devicetree/bindings/clock/imx8m-clock.yaml. > > You use it as clocks, so I don't understand this comment. > > > If I consider its 'compatible' entries: > > - 'fsl,imx8mm-ccm' -> drivers/clk/imx/clk-imx8mm.c > > - 'fsl,imx8mn-ccm' -> drivers/clk/imx/clk-imx8mn.c > > - 'fsl,imx8mp-ccm' -> drivers/clk/imx/clk-imx8mp.c > > the probe function, triggered by fsl,imx8m{m,n,p}-ccm (and not > > fsl,imx8m{m,n,p}-anatop), > > retrieves the anatop node solely to get its base address, also > > registering its clocks, which > > I would have expected to be registered by another driver, specifically > > the one for anatop: > > > > static int imx8mn_clocks_probe(struct platform_device *pdev) > > { > > struct device *dev = &pdev->dev; > > struct device_node *np = dev->of_node; > > void __iomem *base; > > struct imx_pll14xx_ssc pll1443x_ssc; > > int ret; > > > > clk_hw_data = devm_kzalloc(dev, struct_size(clk_hw_data, hws, > > IMX8MN_CLK_END), GFP_KERNEL); > > if (WARN_ON(!clk_hw_data)) > > return -ENOMEM; > > > > clk_hw_data->num = IMX8MN_CLK_END; > > hws = clk_hw_data->hws; > > > > hws[IMX8MN_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0); > > hws[IMX8MN_CLK_24M] = imx_get_clk_hw_by_name(np, "osc_24m"); > > hws[IMX8MN_CLK_32K] = imx_get_clk_hw_by_name(np, "osc_32k"); > > hws[IMX8MN_CLK_EXT1] = imx_get_clk_hw_by_name(np, "clk_ext1"); > > hws[IMX8MN_CLK_EXT2] = imx_get_clk_hw_by_name(np, "clk_ext2"); > > hws[IMX8MN_CLK_EXT3] = imx_get_clk_hw_by_name(np, "clk_ext3"); > > hws[IMX8MN_CLK_EXT4] = imx_get_clk_hw_by_name(np, "clk_ext4"); > > > > np = of_find_compatible_node(NULL, NULL, "fsl,imx8mn-anatop"); > > base = devm_of_iomap(dev, np, 0, NULL); > > of_node_put(np); > > if (WARN_ON(IS_ERR(base))) { > > ret = PTR_ERR(base); > > goto unregister_hws; > > } > > > > hws[IMX8MN_AUDIO_PLL1_REF_SEL] = imx_clk_hw_mux("audio_pll1_ref_sel", > > base + 0x0, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels)); > > hws[IMX8MN_AUDIO_PLL2_REF_SEL] = imx_clk_hw_mux("audio_pll2_ref_sel", > > base + 0x14, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels)); > > hws[IMX8MN_VIDEO_PLL_REF_SEL] = imx_clk_hw_mux("video_pll_ref_sel", > > base + 0x28, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels)); > > Sorry, I am not going to dwell into drivers code. We talk here about > bindings and new properties. > > Best regards, > Krzysztof >
On 05/10/2024 10:57, Dario Binacchi wrote: > On Thu, Oct 3, 2024 at 12:46 PM Krzysztof Kozlowski <krzk@kernel.org> wrote: >> >> On 01/10/2024 08:29, Dario Binacchi wrote: >>> On Mon, Sep 30, 2024 at 8:45 AM Krzysztof Kozlowski <krzk@kernel.org> wrote: >>>> >>>> On 29/09/2024 22:00, Dario Binacchi wrote: >>>>>> >>>>>> >>>>>>> + properties: >>>>>>> + compatible: >>>>>>> + contains: >>>>>>> + enum: >>>>>>> + - fsl,imx8mm-anatop >>>>>>> + >>>>>>> +then: >>>>>>> + properties: >>>>>>> + fsl,ssc-clocks: >>>>>> >>>>>> Nope. Properties must be defined in top-level. >>>>>> >>>>>>> + $ref: /schemas/types.yaml#/definitions/phandle-array >>>>>>> + description: >>>>>>> + The phandles to the PLLs with spread spectrum clock generation >>>>>>> + hardware capability. >>>>>> >>>>>> These should be clocks. >>>>> >>>>> Sorry, but I can't understand what you're asking me. >>>>> Could you kindly explain it to me in more detail? >>>> >>>> You added new property instead of using existing one for this purpose: >>>> 'clocks'. >>> >>>> >>>> >>>> >>>> Best regards, >>>> Krzysztof >>>> >>> >>> I added this new property specifically for managing spread-spectrum. >>> Indeed, not all clocks/PLLs >>> managed by the node/peripheral support spread-spectrum, and the added >>> properties specify >>> parameters for enabling and tuning SSC for each individual PLL based >>> on the index of each list. >>> If I were to use the 'clocks' property and add a clock to this list >>> that does not support SSC, IMHO >>> the pairings would be less clear. >> >> You duplicate property with argument "pairings shall match". Well, I am >> not happy with the duplication. Clocks have specific order, thus it is >> explicit which one needs tuning. Your other properties can match them as >> well, just index from clocks is offset... > > Just to check if I understood correctly what you are suggesting before > submitting version 3 of the patch. > Something, for example, like: > > clocks = <&clk, IMX8MP_AUDIO_PLL1>, <&clk, IMX8MP_AUDIO_PLL2>, <&clk > IMX8MP_VIDEO_PLL1>; > fsl,ssc-modfreq-hz = <0, 3517>, <2, 6818>; Hm, what is 0? If clock index, then no, it's redundant. The first item in cannot point to other clock. Also, what exactly are you setting here and why assigned-clock-rates are not working? Best regards, Krzysztof
On Sun, Oct 6, 2024 at 3:13 PM Krzysztof Kozlowski <krzk@kernel.org> wrote: > > On 05/10/2024 10:57, Dario Binacchi wrote: > > On Thu, Oct 3, 2024 at 12:46 PM Krzysztof Kozlowski <krzk@kernel.org> wrote: > >> > >> On 01/10/2024 08:29, Dario Binacchi wrote: > >>> On Mon, Sep 30, 2024 at 8:45 AM Krzysztof Kozlowski <krzk@kernel.org> wrote: > >>>> > >>>> On 29/09/2024 22:00, Dario Binacchi wrote: > >>>>>> > >>>>>> > >>>>>>> + properties: > >>>>>>> + compatible: > >>>>>>> + contains: > >>>>>>> + enum: > >>>>>>> + - fsl,imx8mm-anatop > >>>>>>> + > >>>>>>> +then: > >>>>>>> + properties: > >>>>>>> + fsl,ssc-clocks: > >>>>>> > >>>>>> Nope. Properties must be defined in top-level. > >>>>>> > >>>>>>> + $ref: /schemas/types.yaml#/definitions/phandle-array > >>>>>>> + description: > >>>>>>> + The phandles to the PLLs with spread spectrum clock generation > >>>>>>> + hardware capability. > >>>>>> > >>>>>> These should be clocks. > >>>>> > >>>>> Sorry, but I can't understand what you're asking me. > >>>>> Could you kindly explain it to me in more detail? > >>>> > >>>> You added new property instead of using existing one for this purpose: > >>>> 'clocks'. > >>> > >>>> > >>>> > >>>> > >>>> Best regards, > >>>> Krzysztof > >>>> > >>> > >>> I added this new property specifically for managing spread-spectrum. > >>> Indeed, not all clocks/PLLs > >>> managed by the node/peripheral support spread-spectrum, and the added > >>> properties specify > >>> parameters for enabling and tuning SSC for each individual PLL based > >>> on the index of each list. > >>> If I were to use the 'clocks' property and add a clock to this list > >>> that does not support SSC, IMHO > >>> the pairings would be less clear. > >> > >> You duplicate property with argument "pairings shall match". Well, I am > >> not happy with the duplication. Clocks have specific order, thus it is > >> explicit which one needs tuning. Your other properties can match them as > >> well, just index from clocks is offset... > > > > Just to check if I understood correctly what you are suggesting before > > submitting version 3 of the patch. > > Something, for example, like: > > > > clocks = <&clk, IMX8MP_AUDIO_PLL1>, <&clk, IMX8MP_AUDIO_PLL2>, <&clk > > IMX8MP_VIDEO_PLL1>; > > fsl,ssc-modfreq-hz = <0, 3517>, <2, 6818>; > > Hm, what is 0? If clock index, then no, it's redundant. The first item > in cannot point to other clock. > > Also, what exactly are you setting here I am enabling and configuring the spread spectrum. Normal clock: Without spread spectrum, the clock signal has a fixed and repetitive frequency (e.g., 100 MHz). This frequency generates an electromagnetic signal concentrated on a single frequency, and if strong enough, it can disturb other devices. Spread spectrum: With spread spectrum, the clock frequency is slightly "modulated," meaning it oscillates around a central value. For example, if the base frequency is 100 MHz, the clock might vary between 99.5 MHz and 100.5 MHz in a cyclic manner. This small variation spreads the energy over a wider range of frequencies (from 99.5 to 100.5 MHz), reducing the intensity of the signal at any one frequency. > and why assigned-clock-rates are > not working? The traditional clock properties, such as clocks, assigned-clocks-rates, etc retain their usual meaning even when spread spectrum is applied. However, to implement the spread spectrum mechanism in a circuit with a PLL (Phase-Locked Loop), additional specific parameters are introduced to properly configure the frequency modulation: - Modulation frequency: i. e. fsl,ssc-modfreq-hz - Modulation rate: i.e. fsl,ssc-modrate-percent - Modulation type: i. e. fsl,ssc-modmethod (center-spread, down-spread) Additionally, it should be noted that not all anatop PLLs are equipped with circuitry for spread spectrum, but only a small subset of them. This is the reason why I introduced the property "fsl, ssc-clocks". This is another commit [1] on enabling spread spectrum that I implemented some time ago for the am335x. The most evident difference is that in that case the node was a clock node and not a clock controller, as in the case of anatop. The parameters are also not exactly the same, but that depends on the platform. [1] 4a8bc2644ef0cbf8e ("dt-bindings: ti: dpll: add spread spectrum support") Thanks and regards, Dario > > Best regards, > Krzysztof >
On 07/10/2024 17:02, Dario Binacchi wrote: > On Sun, Oct 6, 2024 at 3:13 PM Krzysztof Kozlowski <krzk@kernel.org> wrote: >> >> On 05/10/2024 10:57, Dario Binacchi wrote: >>> On Thu, Oct 3, 2024 at 12:46 PM Krzysztof Kozlowski <krzk@kernel.org> wrote: >>>> >>>> On 01/10/2024 08:29, Dario Binacchi wrote: >>>>> On Mon, Sep 30, 2024 at 8:45 AM Krzysztof Kozlowski <krzk@kernel.org> wrote: >>>>>> >>>>>> On 29/09/2024 22:00, Dario Binacchi wrote: >>>>>>>> >>>>>>>> >>>>>>>>> + properties: >>>>>>>>> + compatible: >>>>>>>>> + contains: >>>>>>>>> + enum: >>>>>>>>> + - fsl,imx8mm-anatop >>>>>>>>> + >>>>>>>>> +then: >>>>>>>>> + properties: >>>>>>>>> + fsl,ssc-clocks: >>>>>>>> >>>>>>>> Nope. Properties must be defined in top-level. >>>>>>>> >>>>>>>>> + $ref: /schemas/types.yaml#/definitions/phandle-array >>>>>>>>> + description: >>>>>>>>> + The phandles to the PLLs with spread spectrum clock generation >>>>>>>>> + hardware capability. >>>>>>>> >>>>>>>> These should be clocks. >>>>>>> >>>>>>> Sorry, but I can't understand what you're asking me. >>>>>>> Could you kindly explain it to me in more detail? >>>>>> >>>>>> You added new property instead of using existing one for this purpose: >>>>>> 'clocks'. >>>>> >>>>>> >>>>>> >>>>>> >>>>>> Best regards, >>>>>> Krzysztof >>>>>> >>>>> >>>>> I added this new property specifically for managing spread-spectrum. >>>>> Indeed, not all clocks/PLLs >>>>> managed by the node/peripheral support spread-spectrum, and the added >>>>> properties specify >>>>> parameters for enabling and tuning SSC for each individual PLL based >>>>> on the index of each list. >>>>> If I were to use the 'clocks' property and add a clock to this list >>>>> that does not support SSC, IMHO >>>>> the pairings would be less clear. >>>> >>>> You duplicate property with argument "pairings shall match". Well, I am >>>> not happy with the duplication. Clocks have specific order, thus it is >>>> explicit which one needs tuning. Your other properties can match them as >>>> well, just index from clocks is offset... >>> >>> Just to check if I understood correctly what you are suggesting before >>> submitting version 3 of the patch. >>> Something, for example, like: >>> >>> clocks = <&clk, IMX8MP_AUDIO_PLL1>, <&clk, IMX8MP_AUDIO_PLL2>, <&clk >>> IMX8MP_VIDEO_PLL1>; >>> fsl,ssc-modfreq-hz = <0, 3517>, <2, 6818>; >> >> Hm, what is 0? If clock index, then no, it's redundant. The first item >> in cannot point to other clock. >> >> Also, what exactly are you setting here > > I am enabling and configuring the spread spectrum. > > Normal clock: Without spread spectrum, the clock signal has a fixed and > repetitive frequency (e.g., 100 MHz). This frequency generates an > electromagnetic > signal concentrated on a single frequency, and if strong enough, it can disturb > other devices. > > Spread spectrum: With spread spectrum, the clock frequency is > slightly "modulated," > meaning it oscillates around a central value. For example, if the base > frequency is 100 MHz, > the clock might vary between 99.5 MHz and 100.5 MHz in a cyclic manner. This > small variation spreads the energy over a wider range of frequencies > (from 99.5 to 100.5 MHz), > reducing the intensity of the signal at any one frequency. Sure, so each board will come with its own, different values and you will not put into the SoC DTSI? Where is the DTS? I received only this patch. > >> and why assigned-clock-rates are >> not working? > > The traditional clock properties, such as clocks, > assigned-clocks-rates, etc retain their usual > meaning even when spread spectrum is applied. However, to implement > the spread spectrum > mechanism in a circuit with a PLL (Phase-Locked Loop), additional > specific parameters are > introduced to properly configure the frequency modulation: > > - Modulation frequency: i. e. fsl,ssc-modfreq-hz > - Modulation rate: i.e. fsl,ssc-modrate-percent > - Modulation type: i. e. fsl,ssc-modmethod (center-spread, down-spread) > > Additionally, it should be noted that not all anatop PLLs are equipped > with circuitry for spread > spectrum, but only a small subset of them. This is the reason why I > introduced the property > "fsl, ssc-clocks". > > This is another commit [1] on enabling spread spectrum that I > implemented some time ago for > the am335x. The most evident difference is that in that case the node > was a clock node and not > a clock controller, as in the case of anatop. The parameters are also > not exactly the same, but > that depends on the platform. > > [1] 4a8bc2644ef0cbf8e ("dt-bindings: ti: dpll: add spread spectrum support") OK, I still do not know what "0" was, but the items are fixed, so you know exactly which clock you are configuring here. Best regards, Krzysztof
On Tue, Oct 8, 2024 at 10:20 AM Krzysztof Kozlowski <krzk@kernel.org> wrote: > > On 07/10/2024 17:02, Dario Binacchi wrote: > > On Sun, Oct 6, 2024 at 3:13 PM Krzysztof Kozlowski <krzk@kernel.org> wrote: > >> > >> On 05/10/2024 10:57, Dario Binacchi wrote: > >>> On Thu, Oct 3, 2024 at 12:46 PM Krzysztof Kozlowski <krzk@kernel.org> wrote: > >>>> > >>>> On 01/10/2024 08:29, Dario Binacchi wrote: > >>>>> On Mon, Sep 30, 2024 at 8:45 AM Krzysztof Kozlowski <krzk@kernel.org> wrote: > >>>>>> > >>>>>> On 29/09/2024 22:00, Dario Binacchi wrote: > >>>>>>>> > >>>>>>>> > >>>>>>>>> + properties: > >>>>>>>>> + compatible: > >>>>>>>>> + contains: > >>>>>>>>> + enum: > >>>>>>>>> + - fsl,imx8mm-anatop > >>>>>>>>> + > >>>>>>>>> +then: > >>>>>>>>> + properties: > >>>>>>>>> + fsl,ssc-clocks: > >>>>>>>> > >>>>>>>> Nope. Properties must be defined in top-level. > >>>>>>>> > >>>>>>>>> + $ref: /schemas/types.yaml#/definitions/phandle-array > >>>>>>>>> + description: > >>>>>>>>> + The phandles to the PLLs with spread spectrum clock generation > >>>>>>>>> + hardware capability. > >>>>>>>> > >>>>>>>> These should be clocks. > >>>>>>> > >>>>>>> Sorry, but I can't understand what you're asking me. > >>>>>>> Could you kindly explain it to me in more detail? > >>>>>> > >>>>>> You added new property instead of using existing one for this purpose: > >>>>>> 'clocks'. > >>>>> > >>>>>> > >>>>>> > >>>>>> > >>>>>> Best regards, > >>>>>> Krzysztof > >>>>>> > >>>>> > >>>>> I added this new property specifically for managing spread-spectrum. > >>>>> Indeed, not all clocks/PLLs > >>>>> managed by the node/peripheral support spread-spectrum, and the added > >>>>> properties specify > >>>>> parameters for enabling and tuning SSC for each individual PLL based > >>>>> on the index of each list. > >>>>> If I were to use the 'clocks' property and add a clock to this list > >>>>> that does not support SSC, IMHO > >>>>> the pairings would be less clear. > >>>> > >>>> You duplicate property with argument "pairings shall match". Well, I am > >>>> not happy with the duplication. Clocks have specific order, thus it is > >>>> explicit which one needs tuning. Your other properties can match them as > >>>> well, just index from clocks is offset... > >>> > >>> Just to check if I understood correctly what you are suggesting before > >>> submitting version 3 of the patch. > >>> Something, for example, like: > >>> > >>> clocks = <&clk, IMX8MP_AUDIO_PLL1>, <&clk, IMX8MP_AUDIO_PLL2>, <&clk > >>> IMX8MP_VIDEO_PLL1>; > >>> fsl,ssc-modfreq-hz = <0, 3517>, <2, 6818>; > >> > >> Hm, what is 0? If clock index, then no, it's redundant. The first item > >> in cannot point to other clock. > >> > >> Also, what exactly are you setting here > > > > I am enabling and configuring the spread spectrum. > > > > Normal clock: Without spread spectrum, the clock signal has a fixed and > > repetitive frequency (e.g., 100 MHz). This frequency generates an > > electromagnetic > > signal concentrated on a single frequency, and if strong enough, it can disturb > > other devices. > > > > Spread spectrum: With spread spectrum, the clock frequency is > > slightly "modulated," > > meaning it oscillates around a central value. For example, if the base > > frequency is 100 MHz, > > the clock might vary between 99.5 MHz and 100.5 MHz in a cyclic manner. This > > small variation spreads the energy over a wider range of frequencies > > (from 99.5 to 100.5 MHz), > > reducing the intensity of the signal at any one frequency. > > Sure, so each board will come with its own, different values and you > will not put into the SoC DTSI? Yes, exactly. > > Where is the DTS? I received only this patch. I haven't had time to push the board I'm working on upstream yet. Locally, I apply this patch: --- a/arch/arm64/boot/dts/freescale/imx8mp-icore-mx8mp-ctouch2-of10.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-icore-mx8mp-ctouch2-of10.dts @@ -113,6 +113,13 @@ reg_usdhc2_vmmc: regulator-usdhc2 { }; }; +&anatop { + fsl,ssc-clocks = <&clk IMX8MP_VIDEO_PLL1>; + fsl,ssc-modfreq-hz = <6818>; + fsl,ssc-modrate-percent = <3>; + fsl,ssc-modmethod = "down-spread"; +}; + /* Ethernet */ &eqos { pinctrl-names = "default"; > > > > >> and why assigned-clock-rates are > >> not working? > > > > The traditional clock properties, such as clocks, > > assigned-clocks-rates, etc retain their usual > > meaning even when spread spectrum is applied. However, to implement > > the spread spectrum > > mechanism in a circuit with a PLL (Phase-Locked Loop), additional > > specific parameters are > > introduced to properly configure the frequency modulation: > > > > - Modulation frequency: i. e. fsl,ssc-modfreq-hz > > - Modulation rate: i.e. fsl,ssc-modrate-percent > > - Modulation type: i. e. fsl,ssc-modmethod (center-spread, down-spread) > > > > Additionally, it should be noted that not all anatop PLLs are equipped > > with circuitry for spread > > spectrum, but only a small subset of them. This is the reason why I > > introduced the property > > "fsl, ssc-clocks". > > > > This is another commit [1] on enabling spread spectrum that I > > implemented some time ago for > > the am335x. The most evident difference is that in that case the node > > was a clock node and not > > a clock controller, as in the case of anatop. The parameters are also > > not exactly the same, but > > that depends on the platform. > > > > [1] 4a8bc2644ef0cbf8e ("dt-bindings: ti: dpll: add spread spectrum support") > > > OK, I still do not know what "0" was, but the items are fixed, so you > know exactly which clock you are configuring here. So, after delving deeper into the topic, is it now acceptable to use the property "fsl,ssc-clocks" instead of "clocks"? As in the patch I applied locally? Thanks and regards, Dario > > Best regards, > Krzysztof >
diff --git a/Documentation/devicetree/bindings/clock/fsl,imx8m-anatop.yaml b/Documentation/devicetree/bindings/clock/fsl,imx8m-anatop.yaml index bbd22e95b319..c91eb4229ed3 100644 --- a/Documentation/devicetree/bindings/clock/fsl,imx8m-anatop.yaml +++ b/Documentation/devicetree/bindings/clock/fsl,imx8m-anatop.yaml @@ -32,6 +32,47 @@ properties: '#clock-cells': const: 1 +if: + properties: + compatible: + contains: + enum: + - fsl,imx8mm-anatop + +then: + properties: + fsl,ssc-clocks: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + The phandles to the PLLs with spread spectrum clock generation + hardware capability. + maxItems: 4 + + fsl,ssc-modfreq-hz: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: + The values of modulation frequency (Hz unit) of spread spectrum + clocking for each PLL. + maxItems: 4 + + fsl,ssc-modrate-percent: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: + The percentage values of modulation rate of spread spectrum + clocking for each PLL. + maxItems: 4 + + fsl,ssc-modmethod: + $ref: /schemas/types.yaml#/definitions/string-array + description: + The modulation techniques of spread spectrum clocking for + each PLL. + oneOf: + - enum: + - down-spread + - up-spread + - center-spread + maxItems: 4 required: - compatible
The patch adds the DT bindings for enabling and tuning spread spectrum clocking generation. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> --- .../bindings/clock/fsl,imx8m-anatop.yaml | 41 +++++++++++++++++++ 1 file changed, 41 insertions(+)