| Message ID | 20240912130653.11028-4-yi.l.liu@intel.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Support attaching PASID to the blocked_domain | expand |
On 9/12/24 9:06 PM, Yi Liu wrote: > The iommu drivers are on the way to drop the remove_dev_pasid op by > extending the blocked_domain to support PASID. However, this cannot be > done in one shot. So far, the Intel iommu and the ARM SMMUv3 driver have > supported it, while the AMD iommu driver has not yet. During this > transition, the IOMMU core needs to support both ways to destroy the > attachment of device/PASID and domain. > > Signed-off-by: Yi Liu<yi.l.liu@intel.com> > --- > drivers/iommu/iommu.c | 30 ++++++++++++++++++++++++------ > 1 file changed, 24 insertions(+), 6 deletions(-) This patch should be moved before the change in drivers. After all drivers convert to use set blocking domain to pasid, the remove_dev_pasid could be removed as the last step. Thanks, baolu
On 2024/9/13 10:24, Baolu Lu wrote: > On 9/12/24 9:06 PM, Yi Liu wrote: >> The iommu drivers are on the way to drop the remove_dev_pasid op by >> extending the blocked_domain to support PASID. However, this cannot be >> done in one shot. So far, the Intel iommu and the ARM SMMUv3 driver have >> supported it, while the AMD iommu driver has not yet. During this >> transition, the IOMMU core needs to support both ways to destroy the >> attachment of device/PASID and domain. >> >> Signed-off-by: Yi Liu<yi.l.liu@intel.com> >> --- >> drivers/iommu/iommu.c | 30 ++++++++++++++++++++++++------ >> 1 file changed, 24 insertions(+), 6 deletions(-) > > This patch should be moved before the change in drivers. After all > drivers convert to use set blocking domain to pasid, the > remove_dev_pasid could be removed as the last step. you are right! let me fix it.
> From: Liu, Yi L <yi.l.liu@intel.com> > Sent: Thursday, September 12, 2024 9:07 PM > > The iommu drivers are on the way to drop the remove_dev_pasid op by > extending the blocked_domain to support PASID. However, this cannot be > done in one shot. So far, the Intel iommu and the ARM SMMUv3 driver have > supported it, while the AMD iommu driver has not yet. During this > transition, the IOMMU core needs to support both ways to destroy the > attachment of device/PASID and domain. > > Signed-off-by: Yi Liu <yi.l.liu@intel.com> > --- > drivers/iommu/iommu.c | 30 ++++++++++++++++++++++++------ > 1 file changed, 24 insertions(+), 6 deletions(-) > > diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c > index f3f81c04b8fb..b6b44b184004 100644 > --- a/drivers/iommu/iommu.c > +++ b/drivers/iommu/iommu.c > @@ -3324,6 +3324,28 @@ bool iommu_group_dma_owner_claimed(struct > iommu_group *group) > } > EXPORT_SYMBOL_GPL(iommu_group_dma_owner_claimed); > > +/* > + * This is only needed in the transition of dropping remove_dev_pasid op > + * by adding set_dev_pasid op for the blocked domains. > + */ let's be specific that it's gated by AMD's support and temporary. with the order adjusted as Baolu suggested: Reviewed-by: Kevin Tian <kevin.tian@intel.com>
diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index f3f81c04b8fb..b6b44b184004 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -3324,6 +3324,28 @@ bool iommu_group_dma_owner_claimed(struct iommu_group *group) } EXPORT_SYMBOL_GPL(iommu_group_dma_owner_claimed); +/* + * This is only needed in the transition of dropping remove_dev_pasid op + * by adding set_dev_pasid op for the blocked domains. + */ +static void iommu_remove_dev_pasid(struct device *dev, ioasid_t pasid, + struct iommu_domain *domain) +{ + const struct iommu_ops *ops = dev_iommu_ops(dev); + struct iommu_domain *blocked_domain = ops->blocked_domain; + int ret = 1; + + if (blocked_domain->ops->set_dev_pasid) { + ret = blocked_domain->ops->set_dev_pasid(blocked_domain, + dev, pasid, domain); + } else if (ops->remove_dev_pasid) { + ops->remove_dev_pasid(dev, pasid, domain); + ret = 0; + } + + WARN_ON(ret); +} + static int __iommu_set_group_pasid(struct iommu_domain *domain, struct iommu_group *group, ioasid_t pasid) { @@ -3342,11 +3364,9 @@ static int __iommu_set_group_pasid(struct iommu_domain *domain, err_revert: last_gdev = device; for_each_group_device(group, device) { - const struct iommu_ops *ops = dev_iommu_ops(device->dev); - if (device == last_gdev) break; - ops->remove_dev_pasid(device->dev, pasid, domain); + iommu_remove_dev_pasid(device->dev, pasid, domain); } return ret; } @@ -3356,11 +3376,9 @@ static void __iommu_remove_group_pasid(struct iommu_group *group, struct iommu_domain *domain) { struct group_device *device; - const struct iommu_ops *ops; for_each_group_device(group, device) { - ops = dev_iommu_ops(device->dev); - ops->remove_dev_pasid(device->dev, pasid, domain); + iommu_remove_dev_pasid(device->dev, pasid, domain); } }
The iommu drivers are on the way to drop the remove_dev_pasid op by extending the blocked_domain to support PASID. However, this cannot be done in one shot. So far, the Intel iommu and the ARM SMMUv3 driver have supported it, while the AMD iommu driver has not yet. During this transition, the IOMMU core needs to support both ways to destroy the attachment of device/PASID and domain. Signed-off-by: Yi Liu <yi.l.liu@intel.com> --- drivers/iommu/iommu.c | 30 ++++++++++++++++++++++++------ 1 file changed, 24 insertions(+), 6 deletions(-)