| Message ID | 20240930145955.4248-3-wsa+renesas@sang-engineering.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | dmaengine: sh: rz-dmac: add r7s72100 support | expand |
Hi Wolfram, Thanks for your patch! On Mon, Sep 30, 2024 at 5:00 PM Wolfram Sang <wsa+renesas@sang-engineering.com> wrote: > Document the Renesas RZ/A1L DMAC block. This one does not require clocks RZ/A1H > and resets, so update the bindings accordingly. > > Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> > --- a/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml > +++ b/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml > @@ -4,18 +4,16 @@ > $id: http://devicetree.org/schemas/dma/renesas,rz-dmac.yaml# > $schema: http://devicetree.org/meta-schemas/core.yaml# > > -title: Renesas RZ/{G2L,G2UL,V2L} DMA Controller > +title: Renesas RZ/{A1L,G2L,G2UL,V2L} DMA Controller "A1H", or perhaps just "RZ-series"? > > maintainers: > - Biju Das <biju.das.jz@bp.renesas.com> > > -allOf: > - - $ref: dma-controller.yaml# > - > properties: > compatible: > items: > - enum: > + - renesas,r7s72100-dmac # RZ/A1L RZ/A1H The rest LGTM. Gr{oetje,eeting}s, Geert
> > Document the Renesas RZ/A1L DMAC block. This one does not require clocks > > RZ/A1H Argh, I managed to mix it up again. Thanks! > > -title: Renesas RZ/{G2L,G2UL,V2L} DMA Controller > > +title: Renesas RZ/{A1L,G2L,G2UL,V2L} DMA Controller I'd vote for your suggestion. Biju?
Hi Wolfram, > -----Original Message----- > From: Wolfram Sang <wsa+renesas@sang-engineering.com> > Sent: Monday, September 30, 2024 8:26 PM > Subject: Re: [PATCH 2/3] dt-bindings: dma: rz-dmac: Document RZ/A1L SoC > > > > > Document the Renesas RZ/A1L DMAC block. This one does not require clocks > > > > RZ/A1H > > Argh, I managed to mix it up again. Thanks! > > > > -title: Renesas RZ/{G2L,G2UL,V2L} DMA Controller > > > +title: Renesas RZ/{A1L,G2L,G2UL,V2L} DMA Controller > > I'd vote for your suggestion. Biju? This list is going to grow like RZ/A1, RZ/A2, RZ/G2L, RZ/G2LC, RZ/G2UL, RZ/V2L, RZ/Five, RZ/G3 devices, RZ/V2H and future generation SoCs. So maybe some thing generic should fit here. On RZ family, majority of devices, except RZ/G1 and RZ/G2{H,M,N,E} uses this DMA. Maybe we can mention this as "RZ DMA controller" and on commit message mention about "RZ/G1 and RZ/G2{H,M,N,E} devices". Cheers, Biju
diff --git a/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml b/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml index ca24cf48769f..e05aaf24eb64 100644 --- a/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml +++ b/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml @@ -4,18 +4,16 @@ $id: http://devicetree.org/schemas/dma/renesas,rz-dmac.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Renesas RZ/{G2L,G2UL,V2L} DMA Controller +title: Renesas RZ/{A1L,G2L,G2UL,V2L} DMA Controller maintainers: - Biju Das <biju.das.jz@bp.renesas.com> -allOf: - - $ref: dma-controller.yaml# - properties: compatible: items: - enum: + - renesas,r7s72100-dmac # RZ/A1L - renesas,r9a07g043-dmac # RZ/G2UL and RZ/Five - renesas,r9a07g044-dmac # RZ/G2{L,LC} - renesas,r9a07g054-dmac # RZ/V2L @@ -93,13 +91,26 @@ required: - reg - interrupts - interrupt-names - - clocks - - clock-names - '#dma-cells' - dma-channels - power-domains - - resets - - reset-names + +allOf: + - $ref: dma-controller.yaml# + + - if: + not: + properties: + compatible: + contains: + enum: + - renesas,r7s72100-dmac + then: + required: + - clocks + - clock-names + - resets + - reset-names additionalProperties: false
Document the Renesas RZ/A1L DMAC block. This one does not require clocks and resets, so update the bindings accordingly. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> --- .../bindings/dma/renesas,rz-dmac.yaml | 27 +++++++++++++------ 1 file changed, 19 insertions(+), 8 deletions(-)