Message ID | 1727726138-2203615-2-git-send-email-radhey.shyam.pandey@amd.com (mailing list archive) |
---|---|
State | Superseded |
Delegated to: | Netdev Maintainers |
Headers | show |
Series | net: xilinx: emaclite: Adopt clock support | expand |
On Tue, Oct 01, 2024 at 01:25:36AM +0530, Radhey Shyam Pandey wrote: > From: Abin Joseph <abin.joseph@amd.com> > > Add s_axi_aclk AXI4 clock support and make clk optional to keep DTB > backward compatibility. Define max supported clock constraints. Why was the clock not provided before, but is now? Was it automatically enabled by firmware and that is no longer done? I'm suspicious of the clock being made optional, but the driver doing nothing other than enable it. That reeks of actually being required to me. > > Signed-off-by: Abin Joseph <abin.joseph@amd.com> > Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> > --- > Documentation/devicetree/bindings/net/xlnx,emaclite.yaml | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/Documentation/devicetree/bindings/net/xlnx,emaclite.yaml b/Documentation/devicetree/bindings/net/xlnx,emaclite.yaml > index 92d8ade988f6..8fcf0732d713 100644 > --- a/Documentation/devicetree/bindings/net/xlnx,emaclite.yaml > +++ b/Documentation/devicetree/bindings/net/xlnx,emaclite.yaml > @@ -29,6 +29,9 @@ properties: > interrupts: > maxItems: 1 > > + clocks: > + maxItems: 1 > + > phy-handle: true > > local-mac-address: true > -- > 2.34.1 >
> -----Original Message----- > From: Conor Dooley <conor@kernel.org> > Sent: Tuesday, October 1, 2024 10:22 PM > To: Pandey, Radhey Shyam <radhey.shyam.pandey@amd.com> > Cc: davem@davemloft.net; edumazet@google.com; kuba@kernel.org; > pabeni@redhat.com; robh@kernel.org; krzk+dt@kernel.org; conor+dt@kernel.org; > Simek, Michal <michal.simek@amd.com>; Joseph, Abin <Abin.Joseph@amd.com>; > u.kleine-koenig@pengutronix.de; elfring@users.sourceforge.net; Katakam, Harini > <harini.katakam@amd.com>; netdev@vger.kernel.org; devicetree@vger.kernel.org; > linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; git (AMD-Xilinx) > <git@amd.com> > Subject: Re: [PATCH net-next 1/3] dt-bindings: net: emaclite: Add clock support > > On Tue, Oct 01, 2024 at 01:25:36AM +0530, Radhey Shyam Pandey wrote: > > From: Abin Joseph <abin.joseph@amd.com> > > > > Add s_axi_aclk AXI4 clock support and make clk optional to keep DTB > > backward compatibility. Define max supported clock constraints. > > Why was the clock not provided before, but is now? > Was it automatically enabled by firmware and that is no longer done? > I'm suspicious of the clock being made optional, but the driver doing nothing other > than enable it. That reeks of actually being required to me. Traditionally these IP were used on microblaze platforms which had fixed clocks enabled all the time. Since AXI Ethernet Lite is a PL IP, it can also be used on SoC platforms like Zynq UltraScale+ MPSoC which combines processing system (PS) and user-programmable logic (PL) into the same device. On these platforms instead of fixed enabled clocks it is mandatory to explicitly enable IP clocks for proper functionality. It gets more interesting when the PL clock is shared between two IPs and one of the drivers is clock adopted and disable the clocks after use and clock framework does not know about other clock users (emaclite IP using clock) and it will turn off the clocks which would lead to hang on emaclite reg access. So, it is needed to correctly model the clock consumers. While browsing i found a similar usecase for GMII to RGMII PL IP. Similar to dt-bindings: net: xilinx_gmii2rgmii: Add clock support[1] [1]: https://lore.kernel.org/all/4ae4d926-73f0-4f30-9d83-908a92046829@kernel.org/ In this series - I noticed that Krzysztof suggested to: Nope, just write the description as items in clocks, instead of maxItems. And drop clock names, are not needed and are kind of obvious. So something like the below would be fine? + clocks: + items: + - description: AXI4 clock. > > > > > Signed-off-by: Abin Joseph <abin.joseph@amd.com> > > Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> > > --- > > Documentation/devicetree/bindings/net/xlnx,emaclite.yaml | 3 +++ > > 1 file changed, 3 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/net/xlnx,emaclite.yaml > > b/Documentation/devicetree/bindings/net/xlnx,emaclite.yaml > > index 92d8ade988f6..8fcf0732d713 100644 > > --- a/Documentation/devicetree/bindings/net/xlnx,emaclite.yaml > > +++ b/Documentation/devicetree/bindings/net/xlnx,emaclite.yaml > > @@ -29,6 +29,9 @@ properties: > > interrupts: > > maxItems: 1 > > > > + clocks: > > + maxItems: 1 > > + > > phy-handle: true > > > > local-mac-address: true > > -- > > 2.34.1 > >
On Tue, Oct 01, 2024 at 07:06:12PM +0000, Pandey, Radhey Shyam wrote: > > -----Original Message----- > > From: Conor Dooley <conor@kernel.org> > > Sent: Tuesday, October 1, 2024 10:22 PM > > To: Pandey, Radhey Shyam <radhey.shyam.pandey@amd.com> > > Cc: davem@davemloft.net; edumazet@google.com; kuba@kernel.org; > > pabeni@redhat.com; robh@kernel.org; krzk+dt@kernel.org; conor+dt@kernel.org; > > Simek, Michal <michal.simek@amd.com>; Joseph, Abin <Abin.Joseph@amd.com>; > > u.kleine-koenig@pengutronix.de; elfring@users.sourceforge.net; Katakam, Harini > > <harini.katakam@amd.com>; netdev@vger.kernel.org; devicetree@vger.kernel.org; > > linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; git (AMD-Xilinx) > > <git@amd.com> > > Subject: Re: [PATCH net-next 1/3] dt-bindings: net: emaclite: Add clock support > > > > On Tue, Oct 01, 2024 at 01:25:36AM +0530, Radhey Shyam Pandey wrote: > > > From: Abin Joseph <abin.joseph@amd.com> > > > > > > Add s_axi_aclk AXI4 clock support and make clk optional to keep DTB > > > backward compatibility. Define max supported clock constraints. > > > > Why was the clock not provided before, but is now? > > Was it automatically enabled by firmware and that is no longer done? > > I'm suspicious of the clock being made optional, but the driver doing nothing other > > than enable it. That reeks of actually being required to me. > > Traditionally these IP were used on microblaze platforms which had fixed > clocks enabled all the time. Since AXI Ethernet Lite is a PL IP, it can also > be used on SoC platforms like Zynq UltraScale+ MPSoC which combines > processing system (PS) and user-programmable logic (PL) into the same > device. On these platforms instead of fixed enabled clocks it is mandatory > to explicitly enable IP clocks for proper functionality. > > It gets more interesting when the PL clock is shared between two IPs > and one of the drivers is clock adopted and disable the clocks after use > and clock framework does not know about other clock users (emaclite > IP using clock) and it will turn off the clocks which would lead to > hang on emaclite reg access. So, it is needed to correctly model the > clock consumers. That means the clock _is_ required, and should be added as such in the binding. The older platforms having a fixed clock doesn't impact whether or not the emaclite IP itself requires the clock to function or not. Mark it required in the binding, although of course the driver cannot require it for backwards compatibility reasons. > While browsing i found a similar usecase for GMII to RGMII PL IP. > Similar to dt-bindings: net: xilinx_gmii2rgmii: Add clock support[1] > [1]: https://lore.kernel.org/all/4ae4d926-73f0-4f30-9d83-908a92046829@kernel.org/ > > In this series - I noticed that Krzysztof suggested to: > Nope, just write the description as items in clocks, instead of > maxItems. And drop clock names, are not needed and are kind of obvious. > > So something like the below would be fine? > > + clocks: > + items: > + - description: AXI4 clock. This would be fine, but your patch is not the same as the one you linked to. It was using clock-names to provide information on the clock, yours does not do that. If there's only one clock, there's usually little point in having clock-names, which is why Krzysztof made that suggestion. Cheers, Conor. > > > > > > Signed-off-by: Abin Joseph <abin.joseph@amd.com> > > > Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> > > > --- > > > Documentation/devicetree/bindings/net/xlnx,emaclite.yaml | 3 +++ > > > 1 file changed, 3 insertions(+) > > > > > > diff --git a/Documentation/devicetree/bindings/net/xlnx,emaclite.yaml > > > b/Documentation/devicetree/bindings/net/xlnx,emaclite.yaml > > > index 92d8ade988f6..8fcf0732d713 100644 > > > --- a/Documentation/devicetree/bindings/net/xlnx,emaclite.yaml > > > +++ b/Documentation/devicetree/bindings/net/xlnx,emaclite.yaml > > > @@ -29,6 +29,9 @@ properties: > > > interrupts: > > > maxItems: 1 > > > > > > + clocks: > > > + maxItems: 1 > > > + > > > phy-handle: true > > > > > > local-mac-address: true > > > -- > > > 2.34.1 > > >
diff --git a/Documentation/devicetree/bindings/net/xlnx,emaclite.yaml b/Documentation/devicetree/bindings/net/xlnx,emaclite.yaml index 92d8ade988f6..8fcf0732d713 100644 --- a/Documentation/devicetree/bindings/net/xlnx,emaclite.yaml +++ b/Documentation/devicetree/bindings/net/xlnx,emaclite.yaml @@ -29,6 +29,9 @@ properties: interrupts: maxItems: 1 + clocks: + maxItems: 1 + phy-handle: true local-mac-address: true