| Message ID | 20241009053946.3198805-4-vineeth.karumanchi@amd.com (mailing list archive) |
|---|---|
| State | RFC |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | net: macb: Add versal2 10GBE device support | expand |
On Wed, Oct 09, 2024 at 11:09:44AM +0530, Vineeth Karumanchi wrote: > New bitfeilds of USX_CONTROL register: > - GEM_RX_SYNC: RX Reset: Reset the receive datapath. > > Constants of the bitfeilds in USX_CONTROL reg: > - HS_SPEED_*: Multiple speed constants of USX_SPEED bitfeild. > - MACB_SERDES_RATE_*: Multiple serdes rate constants of > SERDES_RATE bitfeild. > > Since MACB_SERDES_RATE_* and HS_SPEED_* are register constants, > move them to the header file. > > Signed-off-by: Vineeth Karumanchi <vineeth.karumanchi@amd.com> ... > +/* Constants for USX_CONTROL */ > +#define HS_SPEED_10000M 4 > +#define HS_SPEED_5000M 3 > +#define HS_SPEED_2500M 2 > +#define HS_SPEED_1000M 1 > +#define MACB_SERDES_RATE_10G 1 > +#define MACB_SERDES_RATE_5G 0 > +#define MACB_SERDES_RATE_2_5G 0 > +#define MACB_SERDES_RATE_1G 0 I'm not sure having multiple definitions for the same value for the same field makes sense. Maybe call it MACB_SERDES_RATE_5G_2G5_1G ?
diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h index 5740c98d8c9f..47e80fa72865 100644 --- a/drivers/net/ethernet/cadence/macb.h +++ b/drivers/net/ethernet/cadence/macb.h @@ -563,11 +563,23 @@ #define GEM_RX_SCR_BYPASS_SIZE 1 #define GEM_TX_SCR_BYPASS_OFFSET 8 #define GEM_TX_SCR_BYPASS_SIZE 1 +#define GEM_RX_SYNC_RESET_OFFSET 2 +#define GEM_RX_SYNC_RESET_SIZE 1 #define GEM_TX_EN_OFFSET 1 #define GEM_TX_EN_SIZE 1 #define GEM_SIGNAL_OK_OFFSET 0 #define GEM_SIGNAL_OK_SIZE 1 +/* Constants for USX_CONTROL */ +#define HS_SPEED_10000M 4 +#define HS_SPEED_5000M 3 +#define HS_SPEED_2500M 2 +#define HS_SPEED_1000M 1 +#define MACB_SERDES_RATE_10G 1 +#define MACB_SERDES_RATE_5G 0 +#define MACB_SERDES_RATE_2_5G 0 +#define MACB_SERDES_RATE_1G 0 + /* Bitfields in USX_STATUS. */ #define GEM_USX_BLOCK_LOCK_OFFSET 0 #define GEM_USX_BLOCK_LOCK_SIZE 1 diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c index 8f893f035289..3f9dc0b037c0 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -87,9 +87,6 @@ struct sifive_fu540_macb_mgmt { #define MACB_WOL_ENABLED BIT(0) -#define HS_SPEED_10000M 4 -#define MACB_SERDES_RATE_10G 1 - /* Graceful stop timeouts in us. We should allow up to * 1 frame time (10 Mbits/s, full-duplex, ignoring collisions) */
New bitfeilds of USX_CONTROL register: - GEM_RX_SYNC: RX Reset: Reset the receive datapath. Constants of the bitfeilds in USX_CONTROL reg: - HS_SPEED_*: Multiple speed constants of USX_SPEED bitfeild. - MACB_SERDES_RATE_*: Multiple serdes rate constants of SERDES_RATE bitfeild. Since MACB_SERDES_RATE_* and HS_SPEED_* are register constants, move them to the header file. Signed-off-by: Vineeth Karumanchi <vineeth.karumanchi@amd.com> --- drivers/net/ethernet/cadence/macb.h | 12 ++++++++++++ drivers/net/ethernet/cadence/macb_main.c | 3 --- 2 files changed, 12 insertions(+), 3 deletions(-)