| Message ID | 20241008070708.1985805-2-wei.fang@nxp.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | make PHY output RMII reference clock | expand |
On Tue, Oct 08, 2024 at 03:07:07PM +0800, Wei Fang wrote: > Per the RMII specification, the REF_CLK is sourced from MAC to PHY > or from an external source. But for TJA11xx PHYs, they support to > output a 50MHz RMII reference clock on REF_CLK pin. Previously the > "nxp,rmii-refclk-in" was added to indicate that in RMII mode, if > this property is present, REF_CLK is input to the PHY, otherwise > it is output. This seems inappropriate now. Because according to > the RMII specification, the REF_CLK is originally input, so there > is no need to add an additional "nxp,rmii-refclk-in" property to > declare that REF_CLK is input. > > Unfortunately, because the "nxp,rmii-refclk-in" property has been > added for a while, and we cannot confirm which DTS use the TJA1100 > and TJA1101 PHYs, changing it to switch polarity will cause an ABI > break. But fortunately, this property is only valid for TJA1100 and > TJA1101. For TJA1103/TJA1104/TJA1120/TJA1121 PHYs, this property is > invalid because they use the nxp-c45-tja11xx driver, which is a > different driver from TJA1100/TJA1101. Therefore, for PHYs using > nxp-c45-tja11xx driver, add "nxp,rmii-refclk-out" property to > support outputting RMII reference clock on REF_CLK pin. > > Signed-off-by: Wei Fang <wei.fang@nxp.com> > --- > V2 changes: > 1. Change the property name from "nxp,reverse-mode" to > "nxp,phy-output-refclk". > 2. Simplify the description of the property. > 3. Modify the subject and commit message. > V3 changes: > 1. Keep the "nxp,rmii-refclk-in" property for TJA1100 and TJA1101. > 2. Rephrase the commit message and subject. > V3 changes: > 1. Change the property name from "nxp,phy-output-refclk" to > "nxp,rmii-refclk-out", which means the opposite of "nxp,rmii-refclk-in". > 2. Refactor the patch after fixing the original issue with this YAML. > --- > .../devicetree/bindings/net/nxp,tja11xx.yaml | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml b/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml > index a754a61adc2d..1e688c7a497d 100644 > --- a/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml > +++ b/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml > @@ -62,6 +62,24 @@ allOf: > reference clock output when RMII mode enabled. > Only supported on TJA1100 and TJA1101. > > + - if: > + properties: > + compatible: > + contains: > + enum: > + - ethernet-phy-id001b.b010 > + - ethernet-phy-id001b.b013 > + - ethernet-phy-id001b.b030 > + - ethernet-phy-id001b.b031 > + > + then: > + properties: > + nxp,rmii-refclk-out: > + type: boolean > + description: | Don't need '|' if no formatting. > + Enable 50MHz RMII reference clock output on REF_CLK pin. This > + property is only applicable to nxp-c45-tja11xx driver. Reword this to not be about some driver. > + > patternProperties: > "^ethernet-phy@[0-9a-f]+$": > type: object > -- > 2.34.1 >
> -----Original Message----- > From: Rob Herring <robh@kernel.org> > Sent: 2024年10月9日 23:12 > To: Wei Fang <wei.fang@nxp.com> > Cc: davem@davemloft.net; edumazet@google.com; kuba@kernel.org; > pabeni@redhat.com; krzk+dt@kernel.org; conor+dt@kernel.org; > andrew@lunn.ch; f.fainelli@gmail.com; hkallweit1@gmail.com; Andrei Botila > (OSS) <andrei.botila@oss.nxp.com>; linux@armlinux.org.uk; > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; > netdev@vger.kernel.org; imx@lists.linux.dev > Subject: Re: [PATCH v2 net-next 1/2] dt-bindings: net: tja11xx: add > "nxp,rmii-refclk-out" property > > On Tue, Oct 08, 2024 at 03:07:07PM +0800, Wei Fang wrote: > > Per the RMII specification, the REF_CLK is sourced from MAC to PHY or > > from an external source. But for TJA11xx PHYs, they support to output > > a 50MHz RMII reference clock on REF_CLK pin. Previously the > > "nxp,rmii-refclk-in" was added to indicate that in RMII mode, if this > > property is present, REF_CLK is input to the PHY, otherwise it is > > output. This seems inappropriate now. Because according to the RMII > > specification, the REF_CLK is originally input, so there is no need to > > add an additional "nxp,rmii-refclk-in" property to declare that > > REF_CLK is input. > > > > Unfortunately, because the "nxp,rmii-refclk-in" property has been > > added for a while, and we cannot confirm which DTS use the TJA1100 and > > TJA1101 PHYs, changing it to switch polarity will cause an ABI break. > > But fortunately, this property is only valid for TJA1100 and TJA1101. > > For TJA1103/TJA1104/TJA1120/TJA1121 PHYs, this property is invalid > > because they use the nxp-c45-tja11xx driver, which is a different > > driver from TJA1100/TJA1101. Therefore, for PHYs using nxp-c45-tja11xx > > driver, add "nxp,rmii-refclk-out" property to support outputting RMII > > reference clock on REF_CLK pin. > > > > Signed-off-by: Wei Fang <wei.fang@nxp.com> > > --- > > V2 changes: > > 1. Change the property name from "nxp,reverse-mode" to > > "nxp,phy-output-refclk". > > 2. Simplify the description of the property. > > 3. Modify the subject and commit message. > > V3 changes: > > 1. Keep the "nxp,rmii-refclk-in" property for TJA1100 and TJA1101. > > 2. Rephrase the commit message and subject. > > V3 changes: > > 1. Change the property name from "nxp,phy-output-refclk" to > > "nxp,rmii-refclk-out", which means the opposite of "nxp,rmii-refclk-in". > > 2. Refactor the patch after fixing the original issue with this YAML. > > --- > > .../devicetree/bindings/net/nxp,tja11xx.yaml | 18 ++++++++++++++++++ > > 1 file changed, 18 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml > > b/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml > > index a754a61adc2d..1e688c7a497d 100644 > > --- a/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml > > +++ b/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml > > @@ -62,6 +62,24 @@ allOf: > > reference clock output when RMII mode enabled. > > Only supported on TJA1100 and TJA1101. > > > > + - if: > > + properties: > > + compatible: > > + contains: > > + enum: > > + - ethernet-phy-id001b.b010 > > + - ethernet-phy-id001b.b013 > > + - ethernet-phy-id001b.b030 > > + - ethernet-phy-id001b.b031 > > + > > + then: > > + properties: > > + nxp,rmii-refclk-out: > > + type: boolean > > + description: | > > Don't need '|' if no formatting. > > > + Enable 50MHz RMII reference clock output on REF_CLK pin. > This > > + property is only applicable to nxp-c45-tja11xx driver. > > Reword this to not be about some driver. Thanks, I will refine it > > > + > > patternProperties: > > "^ethernet-phy@[0-9a-f]+$": > > type: object > > -- > > 2.34.1 > >
diff --git a/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml b/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml index a754a61adc2d..1e688c7a497d 100644 --- a/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml +++ b/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml @@ -62,6 +62,24 @@ allOf: reference clock output when RMII mode enabled. Only supported on TJA1100 and TJA1101. + - if: + properties: + compatible: + contains: + enum: + - ethernet-phy-id001b.b010 + - ethernet-phy-id001b.b013 + - ethernet-phy-id001b.b030 + - ethernet-phy-id001b.b031 + + then: + properties: + nxp,rmii-refclk-out: + type: boolean + description: | + Enable 50MHz RMII reference clock output on REF_CLK pin. This + property is only applicable to nxp-c45-tja11xx driver. + patternProperties: "^ethernet-phy@[0-9a-f]+$": type: object
Per the RMII specification, the REF_CLK is sourced from MAC to PHY or from an external source. But for TJA11xx PHYs, they support to output a 50MHz RMII reference clock on REF_CLK pin. Previously the "nxp,rmii-refclk-in" was added to indicate that in RMII mode, if this property is present, REF_CLK is input to the PHY, otherwise it is output. This seems inappropriate now. Because according to the RMII specification, the REF_CLK is originally input, so there is no need to add an additional "nxp,rmii-refclk-in" property to declare that REF_CLK is input. Unfortunately, because the "nxp,rmii-refclk-in" property has been added for a while, and we cannot confirm which DTS use the TJA1100 and TJA1101 PHYs, changing it to switch polarity will cause an ABI break. But fortunately, this property is only valid for TJA1100 and TJA1101. For TJA1103/TJA1104/TJA1120/TJA1121 PHYs, this property is invalid because they use the nxp-c45-tja11xx driver, which is a different driver from TJA1100/TJA1101. Therefore, for PHYs using nxp-c45-tja11xx driver, add "nxp,rmii-refclk-out" property to support outputting RMII reference clock on REF_CLK pin. Signed-off-by: Wei Fang <wei.fang@nxp.com> --- V2 changes: 1. Change the property name from "nxp,reverse-mode" to "nxp,phy-output-refclk". 2. Simplify the description of the property. 3. Modify the subject and commit message. V3 changes: 1. Keep the "nxp,rmii-refclk-in" property for TJA1100 and TJA1101. 2. Rephrase the commit message and subject. V3 changes: 1. Change the property name from "nxp,phy-output-refclk" to "nxp,rmii-refclk-out", which means the opposite of "nxp,rmii-refclk-in". 2. Refactor the patch after fixing the original issue with this YAML. --- .../devicetree/bindings/net/nxp,tja11xx.yaml | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)