| Message ID | 20241013-upstream_s32cc_gmac-v3-13-d84b5a67b930@oss.nxp.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Add support for Synopsis DWMAC IP on NXP Automotive SoCs S32G2xx/S32G3xx/S32R45 | expand |
On 13/10/2024 23:27, Jan Petrous via B4 Relay wrote: > From: "Jan Petrous (OSS)" <jan.petrous@oss.nxp.com> > > Add basic description for DWMAC ethernet IP on NXP S32G2xx, S32G3xx > and S32R45 automotive series SoCs. > > Signed-off-by: Jan Petrous (OSS) <jan.petrous@oss.nxp.com> > --- > .../devicetree/bindings/net/nxp,s32-dwmac.yaml | 97 ++++++++++++++++++++++ > .../devicetree/bindings/net/snps,dwmac.yaml | 1 + > 2 files changed, 98 insertions(+) > > diff --git a/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml b/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml > new file mode 100644 > index 000000000000..4c65994cbe8b > --- /dev/null > +++ b/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml > @@ -0,0 +1,97 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +# Copyright 2021-2024 NXP > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/net/nxp,s32-dwmac.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: NXP S32G2xx/S32G3xx/S32R45 GMAC ethernet controller > + > +maintainers: > + - Jan Petrous (OSS) <jan.petrous@oss.nxp.com> > + > +description: > + This device is a Synopsys DWC IP, integrated on NXP S32G/R SoCs. > + > +properties: > + compatible: > + enum: > + - nxp,s32g2-dwmac Where are the other compatibles? Commit msg mentions several devices. > + > + reg: > + items: > + - description: Main GMAC registers > + - description: GMAC PHY mode control register > + ... > + > + mdio { > + #address-cells = <1>; > + #size-cells = <0>; > + compatible = "snps,dwmac-mdio"; > + > + phy0: ethernet-phy@0 { > + reg = <0>; > + }; > + Stray blank line. Best regards, Krzysztof
On Mon, Oct 14, 2024 at 08:56:58AM +0200, Krzysztof Kozlowski wrote: > On 13/10/2024 23:27, Jan Petrous via B4 Relay wrote: > > From: "Jan Petrous (OSS)" <jan.petrous@oss.nxp.com> > > > > Add basic description for DWMAC ethernet IP on NXP S32G2xx, S32G3xx > > and S32R45 automotive series SoCs. > > > > Signed-off-by: Jan Petrous (OSS) <jan.petrous@oss.nxp.com> > > --- > > .../devicetree/bindings/net/nxp,s32-dwmac.yaml | 97 ++++++++++++++++++++++ > > .../devicetree/bindings/net/snps,dwmac.yaml | 1 + > > 2 files changed, 98 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml b/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml > > new file mode 100644 > > index 000000000000..4c65994cbe8b > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml > > @@ -0,0 +1,97 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +# Copyright 2021-2024 NXP > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/net/nxp,s32-dwmac.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: NXP S32G2xx/S32G3xx/S32R45 GMAC ethernet controller > > + > > +maintainers: > > + - Jan Petrous (OSS) <jan.petrous@oss.nxp.com> > > + > > +description: > > + This device is a Synopsys DWC IP, integrated on NXP S32G/R SoCs. > > + > > +properties: > > + compatible: > > + enum: > > + - nxp,s32g2-dwmac > > Where are the other compatibles? Commit msg mentions several devices. Well, I removed other compatibles thinking we can re-use this only one also for other SoCs as, on currect stage, we don't need to do any SoC specific setup. Is it ok or shall I reinsert them? > > > + > > + reg: > > + items: > > + - description: Main GMAC registers > > + - description: GMAC PHY mode control register > > + > > ... > > > + > > + mdio { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + compatible = "snps,dwmac-mdio"; > > + > > + phy0: ethernet-phy@0 { > > + reg = <0>; > > + }; > > + > > Stray blank line. > Ah, missed it. Thanks. Will fix it in v4. /Jan
On 14/10/2024 09:48, Jan Petrous wrote: > On Mon, Oct 14, 2024 at 08:56:58AM +0200, Krzysztof Kozlowski wrote: >> On 13/10/2024 23:27, Jan Petrous via B4 Relay wrote: >>> From: "Jan Petrous (OSS)" <jan.petrous@oss.nxp.com> >>> >>> Add basic description for DWMAC ethernet IP on NXP S32G2xx, S32G3xx >>> and S32R45 automotive series SoCs. >>> >>> Signed-off-by: Jan Petrous (OSS) <jan.petrous@oss.nxp.com> >>> --- >>> .../devicetree/bindings/net/nxp,s32-dwmac.yaml | 97 ++++++++++++++++++++++ >>> .../devicetree/bindings/net/snps,dwmac.yaml | 1 + >>> 2 files changed, 98 insertions(+) >>> >>> diff --git a/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml b/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml >>> new file mode 100644 >>> index 000000000000..4c65994cbe8b >>> --- /dev/null >>> +++ b/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml >>> @@ -0,0 +1,97 @@ >>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >>> +# Copyright 2021-2024 NXP >>> +%YAML 1.2 >>> +--- >>> +$id: http://devicetree.org/schemas/net/nxp,s32-dwmac.yaml# >>> +$schema: http://devicetree.org/meta-schemas/core.yaml# >>> + >>> +title: NXP S32G2xx/S32G3xx/S32R45 GMAC ethernet controller >>> + >>> +maintainers: >>> + - Jan Petrous (OSS) <jan.petrous@oss.nxp.com> >>> + >>> +description: >>> + This device is a Synopsys DWC IP, integrated on NXP S32G/R SoCs. >>> + >>> +properties: >>> + compatible: >>> + enum: >>> + - nxp,s32g2-dwmac >> >> Where are the other compatibles? Commit msg mentions several devices. > > Well, I removed other compatibles thinking we can re-use this only one > also for other SoCs as, on currect stage, we don't need to do any > SoC specific setup. > > Is it ok or shall I reinsert them? Do not use compatibles from other devices for something else. Please consult writing-bindings. Yes, bring back all relevant compatibles, use proper fallbacks and compatibility when appropriate (hundreds of examples in the kernel). Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml b/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml new file mode 100644 index 000000000000..4c65994cbe8b --- /dev/null +++ b/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml @@ -0,0 +1,97 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2021-2024 NXP +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/nxp,s32-dwmac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP S32G2xx/S32G3xx/S32R45 GMAC ethernet controller + +maintainers: + - Jan Petrous (OSS) <jan.petrous@oss.nxp.com> + +description: + This device is a Synopsys DWC IP, integrated on NXP S32G/R SoCs. + +properties: + compatible: + enum: + - nxp,s32g2-dwmac + + reg: + items: + - description: Main GMAC registers + - description: GMAC PHY mode control register + + interrupts: + maxItems: 1 + + interrupt-names: + const: macirq + + clocks: + items: + - description: Main GMAC clock + - description: Transmit clock + - description: Receive clock + - description: PTP reference clock + + clock-names: + items: + - const: stmmaceth + - const: tx + - const: rx + - const: ptp_ref + +required: + - clocks + - clock-names + +allOf: + - $ref: snps,dwmac.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/phy/phy.h> + bus { + #address-cells = <2>; + #size-cells = <2>; + + ethernet@4033c000 { + compatible = "nxp,s32g2-dwmac"; + reg = <0x0 0x4033c000 0x0 0x2000>, /* gmac IP */ + <0x0 0x4007c004 0x0 0x4>; /* GMAC_0_CTRL_STS */ + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "macirq"; + snps,mtl-rx-config = <&mtl_rx_setup>; + snps,mtl-tx-config = <&mtl_tx_setup>; + clocks = <&clks 24>, <&clks 17>, <&clks 16>, <&clks 15>; + clock-names = "stmmaceth", "tx", "rx", "ptp_ref"; + phy-mode = "rgmii-id"; + phy-handle = <&phy0>; + + mtl_rx_setup: rx-queues-config { + snps,rx-queues-to-use = <5>; + }; + + mtl_tx_setup: tx-queues-config { + snps,tx-queues-to-use = <5>; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + + phy0: ethernet-phy@0 { + reg = <0>; + }; + + }; + }; + }; diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml index 4e2ba1bf788c..f4887e9957ce 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -66,6 +66,7 @@ properties: - ingenic,x2000-mac - loongson,ls2k-dwmac - loongson,ls7a-dwmac + - nxp,s32g2-dwmac - qcom,qcs404-ethqos - qcom,sa8775p-ethqos - qcom,sc8280xp-ethqos