diff mbox series

dt-bindings: spi: Add bcm2835-aux-spi.yaml file.

Message ID Zw1Oj1utiBJ9Sosg@Emma (mailing list archive)
State New
Headers show
Series dt-bindings: spi: Add bcm2835-aux-spi.yaml file. | expand

Commit Message

Karan Sanghavi Oct. 14, 2024, 5:02 p.m. UTC
Converted the brcm,bcm2835-aux-spi.txt file to
its respective yaml file format.

Signed-off-by: Karan Sanghavi <karansanghvi98@gmail.com>
---

While running
make CHECK_DTBS=y broadcom/bcm2711-rpi-4-b.dtb,
I encountered an error related to the compatible property
for brcm,bcm2835-aux-spi. To resolve this, I converted the
text file to a YAML binding file and checked it with

make dt_binding_check DT_SCHEMA_FILES=brcm,bcm2835-aux-spi.yaml

and

make CHECK_DTBS=y broadcom/bcm2711-rpi-4-b.dtb

and generates no error.

However, I have a question regarding the cs-gpios property.
The BCM2711 datasheet mentions that each Universal SPI
Master has 3 independent chip selects. I’m wondering
if this means these chip select (CS) pins are native,
or if we still need to attach GPIOs to them.
If GPIOs are required for these 3 CS pins,
does that mean we also need to include them in the
device tree schema? and also as arequired property in
binding?

 .../bindings/spi/brcm,bcm2835-aux-spi.txt     | 38 -----------
 .../bindings/spi/brcm,bcm2835-aux-spi.yaml    | 66 +++++++++++++++++++
 2 files changed, 66 insertions(+), 38 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/spi/brcm,bcm2835-aux-spi.txt
 create mode 100644 Documentation/devicetree/bindings/spi/brcm,bcm2835-aux-spi.yaml

Comments

Krzysztof Kozlowski Oct. 14, 2024, 5:57 p.m. UTC | #1
On 14/10/2024 19:02, Karan Sanghavi wrote:
> Converted the brcm,bcm2835-aux-spi.txt file to
> its respective yaml file format.
> 
> Signed-off-by: Karan Sanghavi <karansanghvi98@gmail.com>
> ---
> 

You already posted it and received review. Why do you send the same?
Please respond to the review.

See submitting-patches document.

Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/spi/brcm,bcm2835-aux-spi.txt b/Documentation/devicetree/bindings/spi/brcm,bcm2835-aux-spi.txt
deleted file mode 100644
index d7668f41b03b..000000000000
--- a/Documentation/devicetree/bindings/spi/brcm,bcm2835-aux-spi.txt
+++ /dev/null
@@ -1,38 +0,0 @@ 
-Broadcom BCM2835 auxiliary SPI1/2 controller
-
-The BCM2835 contains two forms of SPI master controller, one known simply as
-SPI0, and the other known as the "Universal SPI Master"; part of the
-auxiliary block. This binding applies to the SPI1/2 controller.
-
-Required properties:
-- compatible: Should be "brcm,bcm2835-aux-spi".
-- reg: Should contain register location and length for the spi block
-- interrupts: Should contain shared interrupt of the aux block
-- clocks: The clock feeding the SPI controller - needs to
-	  point to the auxiliary clock driver of the bcm2835,
-	  as this clock will enable the output gate for the specific
-	  clock.
-- cs-gpios: the cs-gpios (native cs is NOT supported)
-	    see also spi-bus.txt
-
-Example:
-
-spi1@7e215080 {
-	compatible = "brcm,bcm2835-aux-spi";
-	reg = <0x7e215080 0x40>;
-	interrupts = <1 29>;
-	clocks = <&aux_clocks BCM2835_AUX_CLOCK_SPI1>;
-	#address-cells = <1>;
-	#size-cells = <0>;
-	cs-gpios = <&gpio 18>, <&gpio 17>, <&gpio 16>;
-};
-
-spi2@7e2150c0 {
-	compatible = "brcm,bcm2835-aux-spi";
-	reg = <0x7e2150c0 0x40>;
-	interrupts = <1 29>;
-	clocks = <&aux_clocks BCM2835_AUX_CLOCK_SPI2>;
-	#address-cells = <1>;
-	#size-cells = <0>;
-	cs-gpios = <&gpio 43>, <&gpio 44>, <&gpio 45>;
-};
diff --git a/Documentation/devicetree/bindings/spi/brcm,bcm2835-aux-spi.yaml b/Documentation/devicetree/bindings/spi/brcm,bcm2835-aux-spi.yaml
new file mode 100644
index 000000000000..4c24cf2fe214
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/brcm,bcm2835-aux-spi.yaml
@@ -0,0 +1,66 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/brcm,bcm2835-aux-spi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Broadcom BCM2835 Auxiliary SPI1/2 Controller
+
+maintainers:
+  - Karan Sanghavi <karansanghvi98@gmail.com>
+
+description: |
+  The BCM2835 contains two forms of SPI master controller. One is known simply as
+  SPI0, and the other as the "Universal SPI Master," part of the auxiliary block.
+  This binding applies to the SPI1 and SPI2 auxiliary controllers.
+
+allOf:
+  - $ref: spi-controller.yaml#
+
+properties:
+  compatible:
+    enum:
+      - brcm,bcm2835-aux-spi
+    description: Broadcom BCM2835 Auxiliary SPI controller for SPI1 and SPI2.
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  clocks:
+    items:
+      - description: Reference to the auxiliary clock driver for the BCM2835.
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/bcm2835-aux.h>
+    spi@7e215080 {
+        compatible = "brcm,bcm2835-aux-spi";
+        reg = <0x7e215080 0x40>;
+        interrupts = <1 29>;
+        clocks = <&aux_clocks BCM2835_AUX_CLOCK_SPI1>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+    };
+
+  - |
+    #include <dt-bindings/clock/bcm2835-aux.h>
+    spi@7e2150c0 {
+        compatible = "brcm,bcm2835-aux-spi";
+        reg = <0x7e2150c0 0x40>;
+        interrupts = <1 29>;
+        clocks = <&aux_clocks BCM2835_AUX_CLOCK_SPI2>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+    };
+