| Message ID | 20241017114055.13971-2-quic_uaggarwa@quicinc.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Add support to ignore single SE0 glitches | expand |
On Thu, Oct 17, 2024 at 05:10:54PM +0530, Uttkarsh Aggarwal wrote: > Adding a new 'snps,filter-se0-fsls-eop quirk' DT quirk to dwc3 core to set > GUCTL1 BIT 29. When set, controller will ignore single SE0 glitch on the > linestate during transmission. Only two or more SE0 is considered as > valid EOP on FS/LS port. This bit is applicable only in FS in device mode > and FS/LS mode of operation in host mode. Why this is not device/compatible specific? Just like all other quirks pushed last one year. > > Signed-off-by: Uttkarsh Aggarwal <quic_uaggarwa@quicinc.com> > --- > Documentation/devicetree/bindings/usb/snps,dwc3.yaml | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml > index 1cd0ca90127d..d9e813bbcd80 100644 > --- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml > +++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml > @@ -180,6 +180,12 @@ properties: > description: When set core will set Tx de-emphasis value > type: boolean > > + snps,filter-se0-fsls-eop-quirk: > + description: > + When set controller will ignore single SE0 glitch on the linestate during transmit Does not look like wrapped according to coding style (checkpatch is not a coding style document). Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml index 1cd0ca90127d..d9e813bbcd80 100644 --- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml @@ -180,6 +180,12 @@ properties: description: When set core will set Tx de-emphasis value type: boolean + snps,filter-se0-fsls-eop-quirk: + description: + When set controller will ignore single SE0 glitch on the linestate during transmit + Only two or more SE0 is considered as a valid EOP on FS/LS port. + type: boolean + snps,tx_de_emphasis: description: The value driven to the PHY is controlled by the LTSSM during USB3
Adding a new 'snps,filter-se0-fsls-eop quirk' DT quirk to dwc3 core to set GUCTL1 BIT 29. When set, controller will ignore single SE0 glitch on the linestate during transmission. Only two or more SE0 is considered as valid EOP on FS/LS port. This bit is applicable only in FS in device mode and FS/LS mode of operation in host mode. Signed-off-by: Uttkarsh Aggarwal <quic_uaggarwa@quicinc.com> --- Documentation/devicetree/bindings/usb/snps,dwc3.yaml | 6 ++++++ 1 file changed, 6 insertions(+)