| Message ID | 20241018194753.775074-1-bvanassche@acm.org (mailing list archive) |
|---|---|
| State | Under Review |
| Headers | show |
| Series | [v2] scsi: ufs: core: Make DMA mask configuration more flexible | expand |
On 10/18/24 12:47 PM, Bart Van Assche wrote: > Replace UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS with > ufs_hba_variant_ops::set_dma_mask. Update the Renesas driver accordingly. > This patch enables supporting other configurations than 32-bit or 64-bit > DMA addresses, e.g. 36-bit DMA addresses. There is only one change in this patch compared to v1: the "hba->quirks |= UFSHCD_QUIRK_HIBERN_FASTAUTO;" statement has been restored. Thanks, Bart.
> Replace UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS with > ufs_hba_variant_ops::set_dma_mask. Update the Renesas driver accordingly. > This patch enables supporting other configurations than 32-bit or 64-bit DMA > addresses, e.g. 36-bit DMA addresses. This patch allows to ignore bit 24 (64AS) in the host controller capabilities register. Personally, I am not religious about quirks, not sure however that this is what vop is made for. Also, there is another host-specific option, e.g. the opts member of struct exynos_ufs. > > Signed-off-by: Bart Van Assche <bvanassche@acm.org> Looks good to me. Thanks, Avri > --- > drivers/ufs/core/ufshcd.c | 4 ++-- > drivers/ufs/host/ufs-renesas.c | 9 ++++++++- > include/ufs/ufshcd.h | 9 +++------ > 3 files changed, 13 insertions(+), 9 deletions(-) > > diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c index > e0dba0e3d5b5..a1eb32d301ae 100644 > --- a/drivers/ufs/core/ufshcd.c > +++ b/drivers/ufs/core/ufshcd.c > @@ -2389,8 +2389,6 @@ static inline int ufshcd_hba_capabilities(struct > ufs_hba *hba) > int err; > > hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES); > - if (hba->quirks & UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS) > - hba->capabilities &= ~MASK_64_ADDRESSING_SUPPORT; > > /* nutrs and nutmrs are 0 based values */ > hba->nutrs = (hba->capabilities & > MASK_TRANSFER_REQUESTS_SLOTS_SDB) + 1; @@ -10277,6 +10275,8 @@ > EXPORT_SYMBOL_GPL(ufshcd_dealloc_host); > */ > static int ufshcd_set_dma_mask(struct ufs_hba *hba) { > + if (hba->vops && hba->vops->set_dma_mask) > + return hba->vops->set_dma_mask(hba); > if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) { > if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64))) > return 0; > diff --git a/drivers/ufs/host/ufs-renesas.c b/drivers/ufs/host/ufs-renesas.c > index 8711e5cbc968..3ff97112e1f6 100644 > --- a/drivers/ufs/host/ufs-renesas.c > +++ b/drivers/ufs/host/ufs-renesas.c > @@ -7,6 +7,7 @@ > > #include <linux/clk.h> > #include <linux/delay.h> > +#include <linux/dma-mapping.h> > #include <linux/err.h> > #include <linux/iopoll.h> > #include <linux/kernel.h> > @@ -364,14 +365,20 @@ static int ufs_renesas_init(struct ufs_hba *hba) > return -ENOMEM; > ufshcd_set_variant(hba, priv); > > - hba->quirks |= UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS | > UFSHCD_QUIRK_HIBERN_FASTAUTO; > + hba->quirks |= UFSHCD_QUIRK_HIBERN_FASTAUTO; > > return 0; > } > > +static int ufs_renesas_set_dma_mask(struct ufs_hba *hba) { > + return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32)); } > + > static const struct ufs_hba_variant_ops ufs_renesas_vops = { > .name = "renesas", > .init = ufs_renesas_init, > + .set_dma_mask = ufs_renesas_set_dma_mask, > .setup_clocks = ufs_renesas_setup_clocks, > .hce_enable_notify = ufs_renesas_hce_enable_notify, > .dbg_register_dump = ufs_renesas_dbg_register_dump, diff --git > a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h index > 36bd91ff3593..9ea2a7411bb5 100644 > --- a/include/ufs/ufshcd.h > +++ b/include/ufs/ufshcd.h > @@ -299,6 +299,8 @@ struct ufs_pwr_mode_info { > * @max_num_rtt: maximum RTT supported by the host > * @init: called when the driver is initialized > * @exit: called to cleanup everything done in init > + * @set_dma_mask: For setting another DMA mask than indicated by the > 64AS > + * capability bit. > * @get_ufs_hci_version: called to get UFS HCI version > * @clk_scale_notify: notifies that clks are scaled up/down > * @setup_clocks: called before touching any of the controller registers @@ > -341,6 +343,7 @@ struct ufs_hba_variant_ops { > int (*init)(struct ufs_hba *); > void (*exit)(struct ufs_hba *); > u32 (*get_ufs_hci_version)(struct ufs_hba *); > + int (*set_dma_mask)(struct ufs_hba *); > int (*clk_scale_notify)(struct ufs_hba *, bool, > enum ufs_notify_change_status); > int (*setup_clocks)(struct ufs_hba *, bool, > @@ -623,12 +626,6 @@ enum ufshcd_quirks { > */ > UFSHCD_QUIRK_SKIP_PH_CONFIGURATION = 1 << 16, > > - /* > - * This quirk needs to be enabled if the host controller has > - * 64-bit addressing supported capability but it doesn't work. > - */ > - UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS = 1 << 17, > - > /* > * This quirk needs to be enabled if the host controller has > * auto-hibernate capability but it's FASTAUTO only.
On Fri, 2024-10-18 at 12:47 -0700, Bart Van Assche wrote: > > External email : Please do not click links or open attachments until > you have verified the sender or the content. > Replace UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS with > ufs_hba_variant_ops::set_dma_mask. Update the Renesas driver > accordingly. > This patch enables supporting other configurations than 32-bit or 64- > bit > DMA addresses, e.g. 36-bit DMA addresses. > > Signed-off-by: Bart Van Assche <bvanassche@acm.org> > --- > drivers/ufs/core/ufshcd.c | 4 ++-- > drivers/ufs/host/ufs-renesas.c | 9 ++++++++- > include/ufs/ufshcd.h | 9 +++------ > 3 files changed, 13 insertions(+), 9 deletions(-) > > Reviewed-by: Peter Wang <peter.wang@mediatek.com>
On 10/18/24 11:24 PM, Avri Altman wrote: > This patch allows to ignore bit 24 (64AS) in the host controller capabilities register. That's correct. It is unfortunate that the DMA information reported by the controller is not more detailed. > Personally, I am not religious about quirks, not sure however that this is what vop is made for. > Also, there is another host-specific option, e.g. the opts member of struct exynos_ufs. I need this patch for another controller than an Exynos host controller. > Looks good to me. Does this count as a Reviewed-by ? Thanks, Bart.
> On 10/18/24 11:24 PM, Avri Altman wrote: > > This patch allows to ignore bit 24 (64AS) in the host controller capabilities > register. > > That's correct. It is unfortunate that the DMA information reported by the > controller is not more detailed. > > > Personally, I am not religious about quirks, not sure however that this is > what vop is made for. > > Also, there is another host-specific option, e.g. the opts member of struct > exynos_ufs. > > I need this patch for another controller than an Exynos host controller. > > > Looks good to me. > > Does this count as a Reviewed-by ? Yes. Thanks, Avri > > Thanks, > > Bart.
Bart, > Replace UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS with > ufs_hba_variant_ops::set_dma_mask. Update the Renesas driver > accordingly. This patch enables supporting other configurations than > 32-bit or 64-bit DMA addresses, e.g. 36-bit DMA addresses. Applied to 6.13/scsi-staging, thanks!
diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c index e0dba0e3d5b5..a1eb32d301ae 100644 --- a/drivers/ufs/core/ufshcd.c +++ b/drivers/ufs/core/ufshcd.c @@ -2389,8 +2389,6 @@ static inline int ufshcd_hba_capabilities(struct ufs_hba *hba) int err; hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES); - if (hba->quirks & UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS) - hba->capabilities &= ~MASK_64_ADDRESSING_SUPPORT; /* nutrs and nutmrs are 0 based values */ hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS_SDB) + 1; @@ -10277,6 +10275,8 @@ EXPORT_SYMBOL_GPL(ufshcd_dealloc_host); */ static int ufshcd_set_dma_mask(struct ufs_hba *hba) { + if (hba->vops && hba->vops->set_dma_mask) + return hba->vops->set_dma_mask(hba); if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) { if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64))) return 0; diff --git a/drivers/ufs/host/ufs-renesas.c b/drivers/ufs/host/ufs-renesas.c index 8711e5cbc968..3ff97112e1f6 100644 --- a/drivers/ufs/host/ufs-renesas.c +++ b/drivers/ufs/host/ufs-renesas.c @@ -7,6 +7,7 @@ #include <linux/clk.h> #include <linux/delay.h> +#include <linux/dma-mapping.h> #include <linux/err.h> #include <linux/iopoll.h> #include <linux/kernel.h> @@ -364,14 +365,20 @@ static int ufs_renesas_init(struct ufs_hba *hba) return -ENOMEM; ufshcd_set_variant(hba, priv); - hba->quirks |= UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS | UFSHCD_QUIRK_HIBERN_FASTAUTO; + hba->quirks |= UFSHCD_QUIRK_HIBERN_FASTAUTO; return 0; } +static int ufs_renesas_set_dma_mask(struct ufs_hba *hba) +{ + return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32)); +} + static const struct ufs_hba_variant_ops ufs_renesas_vops = { .name = "renesas", .init = ufs_renesas_init, + .set_dma_mask = ufs_renesas_set_dma_mask, .setup_clocks = ufs_renesas_setup_clocks, .hce_enable_notify = ufs_renesas_hce_enable_notify, .dbg_register_dump = ufs_renesas_dbg_register_dump, diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h index 36bd91ff3593..9ea2a7411bb5 100644 --- a/include/ufs/ufshcd.h +++ b/include/ufs/ufshcd.h @@ -299,6 +299,8 @@ struct ufs_pwr_mode_info { * @max_num_rtt: maximum RTT supported by the host * @init: called when the driver is initialized * @exit: called to cleanup everything done in init + * @set_dma_mask: For setting another DMA mask than indicated by the 64AS + * capability bit. * @get_ufs_hci_version: called to get UFS HCI version * @clk_scale_notify: notifies that clks are scaled up/down * @setup_clocks: called before touching any of the controller registers @@ -341,6 +343,7 @@ struct ufs_hba_variant_ops { int (*init)(struct ufs_hba *); void (*exit)(struct ufs_hba *); u32 (*get_ufs_hci_version)(struct ufs_hba *); + int (*set_dma_mask)(struct ufs_hba *); int (*clk_scale_notify)(struct ufs_hba *, bool, enum ufs_notify_change_status); int (*setup_clocks)(struct ufs_hba *, bool, @@ -623,12 +626,6 @@ enum ufshcd_quirks { */ UFSHCD_QUIRK_SKIP_PH_CONFIGURATION = 1 << 16, - /* - * This quirk needs to be enabled if the host controller has - * 64-bit addressing supported capability but it doesn't work. - */ - UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS = 1 << 17, - /* * This quirk needs to be enabled if the host controller has * auto-hibernate capability but it's FASTAUTO only.
Replace UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS with ufs_hba_variant_ops::set_dma_mask. Update the Renesas driver accordingly. This patch enables supporting other configurations than 32-bit or 64-bit DMA addresses, e.g. 36-bit DMA addresses. Signed-off-by: Bart Van Assche <bvanassche@acm.org> --- drivers/ufs/core/ufshcd.c | 4 ++-- drivers/ufs/host/ufs-renesas.c | 9 ++++++++- include/ufs/ufshcd.h | 9 +++------ 3 files changed, 13 insertions(+), 9 deletions(-)