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[v2,00/11] clk: qcom: add support for clock controllers on the SAR2130P platform

Message ID 20241021-sar2130p-clocks-v2-0-383e5eb123a2@linaro.org (mailing list archive)
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Series clk: qcom: add support for clock controllers on the SAR2130P platform | expand

Message

Dmitry Baryshkov Oct. 21, 2024, 10:30 a.m. UTC
Add support for the RPMh, TCSR, Global, Display and GPU clock
controllers as present on the Qualcomm SAR2130P platform.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
Changes in v2:
- Dropped gcc_camera_hf_axi_clk, gcc_camera_sf_axi_clk,
  gcc_qmip_camera_nrt_ahb_clk, gcc_qmip_camera_rt_ahb_clk,
  gcc_iris_ss_hf_axi1_sreg, gcc_iris_ss_spd_axi1_sreg,
  gcc_video_axi0_sreg and gcc_video_axi1_sreg clocks until corresponding
  subsytems bringup (Taniya)
- Program GDSC_SLEEP_ENA_VOTE directly from the probe function (Taniya)
- Dropped sreg, BRANCH_HALT_POLL and collapse_sleep_mask patches
  (Taniya)
- Dropped gcc_parent_data_4, gcc_parent_map_4, gcc_parent_data_5,
  gcc_parent_map_5 (LKP)
- Link to v1: https://lore.kernel.org/r/20241017-sar2130p-clocks-v1-0-f75e740f0a8d@linaro.org

---
Dmitry Baryshkov (9):
      dt-bindings: clock: qcom,rpmhcc: Add SAR2130P compatible
      dt-bindings: clock: qcom: document SAR2130P Global Clock Controller
      dt-bindings: clock: qcom,sm8550-tcsr: Add SAR2130P compatible
      dt-bindings: clock: qcom,sm8550-dispcc: Add SAR2130P compatible
      clk: qcom: rcg2: add clk_rcg2_shared_floor_ops
      clk: qcom: rpmh: add support for SAR2130P
      clk: qcom: add support for GCC on SAR2130P
      clk: qcom: tcsrcc-sm8550: add SAR2130P support
      clk: qcom: dispcc-sm8550: enable support for SAR2130P

Konrad Dybcio (2):
      dt-bindings: clk: qcom,sm8450-gpucc: add SAR2130P compatibles
      clk: qcom: add SAR2130P GPU Clock Controller support

 .../devicetree/bindings/clock/qcom,rpmhcc.yaml     |    1 +
 .../bindings/clock/qcom,sar2130p-gcc.yaml          |   65 +
 .../bindings/clock/qcom,sm8450-gpucc.yaml          |    2 +
 .../bindings/clock/qcom,sm8550-dispcc.yaml         |    1 +
 .../bindings/clock/qcom,sm8550-tcsr.yaml           |    1 +
 drivers/clk/qcom/Kconfig                           |   22 +-
 drivers/clk/qcom/Makefile                          |    2 +
 drivers/clk/qcom/clk-rcg.h                         |    1 +
 drivers/clk/qcom/clk-rcg2.c                        |   48 +-
 drivers/clk/qcom/clk-rpmh.c                        |   11 +
 drivers/clk/qcom/dispcc-sm8550.c                   |   18 +-
 drivers/clk/qcom/gcc-sar2130p.c                    | 2326 ++++++++++++++++++++
 drivers/clk/qcom/gpucc-sar2130p.c                  |  507 +++++
 drivers/clk/qcom/tcsrcc-sm8550.c                   |   18 +-
 include/dt-bindings/clock/qcom,sar2130p-gcc.h      |  181 ++
 include/dt-bindings/clock/qcom,sar2130p-gpucc.h    |   33 +
 include/dt-bindings/reset/qcom,sar2130p-gpucc.h    |   14 +
 17 files changed, 3240 insertions(+), 11 deletions(-)
---
base-commit: 27e373c583871ca992837ab918709b67e27d1e3d
change-id: 20241017-sar2130p-clocks-5fbdd9bf04ee

Best regards,

Comments

Konrad Dybcio Oct. 21, 2024, 11:07 a.m. UTC | #1
On 21.10.2024 12:30 PM, Dmitry Baryshkov wrote:
> Add support for the RPMh, TCSR, Global, Display and GPU clock
> controllers as present on the Qualcomm SAR2130P platform.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> Changes in v2:
> - Dropped gcc_camera_hf_axi_clk, gcc_camera_sf_axi_clk,
>   gcc_qmip_camera_nrt_ahb_clk, gcc_qmip_camera_rt_ahb_clk,
>   gcc_iris_ss_hf_axi1_sreg, gcc_iris_ss_spd_axi1_sreg,
>   gcc_video_axi0_sreg and gcc_video_axi1_sreg clocks until corresponding
>   subsytems bringup (Taniya)
> - Program GDSC_SLEEP_ENA_VOTE directly from the probe function (Taniya)
> - Dropped sreg, BRANCH_HALT_POLL and collapse_sleep_mask patches
>   (Taniya)
> - Dropped gcc_parent_data_4, gcc_parent_map_4, gcc_parent_data_5,
>   gcc_parent_map_5 (LKP)
> - Link to v1: https://lore.kernel.org/r/20241017-sar2130p-clocks-v1-0-f75e740f0a8d@linaro.org

Please address the remaining comments from me too

Konrad
Dmitry Baryshkov Oct. 21, 2024, 1:14 p.m. UTC | #2
On Mon, 21 Oct 2024 at 14:07, Konrad Dybcio
<konrad.dybcio@oss.qualcomm.com> wrote:
>
> On 21.10.2024 12:30 PM, Dmitry Baryshkov wrote:
> > Add support for the RPMh, TCSR, Global, Display and GPU clock
> > controllers as present on the Qualcomm SAR2130P platform.
> >
> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> > ---
> > Changes in v2:
> > - Dropped gcc_camera_hf_axi_clk, gcc_camera_sf_axi_clk,
> >   gcc_qmip_camera_nrt_ahb_clk, gcc_qmip_camera_rt_ahb_clk,
> >   gcc_iris_ss_hf_axi1_sreg, gcc_iris_ss_spd_axi1_sreg,
> >   gcc_video_axi0_sreg and gcc_video_axi1_sreg clocks until corresponding
> >   subsytems bringup (Taniya)
> > - Program GDSC_SLEEP_ENA_VOTE directly from the probe function (Taniya)
> > - Dropped sreg, BRANCH_HALT_POLL and collapse_sleep_mask patches
> >   (Taniya)
> > - Dropped gcc_parent_data_4, gcc_parent_map_4, gcc_parent_data_5,
> >   gcc_parent_map_5 (LKP)
> > - Link to v1: https://lore.kernel.org/r/20241017-sar2130p-clocks-v1-0-f75e740f0a8d@linaro.org
>
> Please address the remaining comments from me too

Oops. Excuse me.