diff mbox series

[XEN,v3] x86/emul: address violations of MISRA C Rule 16.3

Message ID 63d51d39995c8dbab6f02d74982287a238ee5353.1729500464.git.federico.serafini@bugseng.com (mailing list archive)
State New
Headers show
Series [XEN,v3] x86/emul: address violations of MISRA C Rule 16.3 | expand

Commit Message

Federico Serafini Oct. 21, 2024, 9:55 a.m. UTC
Add missing break statements to address violations of MISRA C:2012
Rule 16.3 (An unconditional `break' statement shall terminate
every switch-clause).

Make explicit unreachability of a program point with
ASSERT_UNREACHABLE() and add defensive code.

No functional change.

Signed-off-by: Federico Serafini <federico.serafini@bugseng.com>
---
Changes in v3:
- return error code from the ureachable path.
Changes in v2:
- unreachability made explicit.
---
 xen/arch/x86/x86_emulate/fpu.c         | 5 +++++
 xen/arch/x86/x86_emulate/x86_emulate.c | 1 +
 2 files changed, 6 insertions(+)

Comments

Andrew Cooper Oct. 22, 2024, 3:49 p.m. UTC | #1
On 21/10/2024 10:55 am, Federico Serafini wrote:
> Add missing break statements to address violations of MISRA C:2012
> Rule 16.3 (An unconditional `break' statement shall terminate
> every switch-clause).
>
> Make explicit unreachability of a program point with
> ASSERT_UNREACHABLE() and add defensive code.
>
> No functional change.
>
> Signed-off-by: Federico Serafini <federico.serafini@bugseng.com>

Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
diff mbox series

Patch

diff --git a/xen/arch/x86/x86_emulate/fpu.c b/xen/arch/x86/x86_emulate/fpu.c
index 480d879657..54c8621421 100644
--- a/xen/arch/x86/x86_emulate/fpu.c
+++ b/xen/arch/x86/x86_emulate/fpu.c
@@ -218,6 +218,7 @@  int x86emul_fpu(struct x86_emulate_state *s,
              */
             if ( dst->type == OP_MEM && !s->fpu_ctrl && !fpu_check_write() )
                 dst->type = OP_NONE;
+            break;
         }
         break;
 
@@ -296,6 +297,7 @@  int x86emul_fpu(struct x86_emulate_state *s,
             default:
                 generate_exception(X86_EXC_UD);
             }
+            break;
         }
         break;
 
@@ -386,6 +388,7 @@  int x86emul_fpu(struct x86_emulate_state *s,
              */
             if ( dst->type == OP_MEM && !s->fpu_ctrl && !fpu_check_write() )
                 dst->type = OP_NONE;
+            break;
         }
         break;
 
@@ -457,6 +460,8 @@  int x86emul_fpu(struct x86_emulate_state *s,
             case 7: /* fistp m64i */
                 goto fpu_memdst64;
             }
+            ASSERT_UNREACHABLE();
+            return X86EMUL_UNHANDLEABLE;
         }
         break;
 
diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c
index 6b6b8c8fe4..30674ec301 100644
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -8310,6 +8310,7 @@  x86_emulate(
         }
         if ( rc != 0 )
             goto done;
+        break;
     default:
         break;
     }