Message ID | 20241025035520.1841792-7-quic_mmanikan@quicinc.com (mailing list archive) |
---|---|
State | New |
Headers | show |
Series | Add NSS clock controller support for IPQ9574 | expand |
Hi Manikanta,
kernel test robot noticed the following build errors:
[auto build test ERROR on clk/clk-next]
[also build test ERROR on robh/for-next arm64/for-next/core linus/master v6.12-rc4 next-20241025]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Manikanta-Mylavarapu/clk-qcom-clk-alpha-pll-Add-NSS-HUAYRA-ALPHA-PLL-support-for-ipq9574/20241025-121244
base: https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next
patch link: https://lore.kernel.org/r/20241025035520.1841792-7-quic_mmanikan%40quicinc.com
patch subject: [PATCH v8 6/7] arm64: dts: qcom: ipq9574: Add nsscc node
config: arm64-randconfig-001-20241026 (https://download.01.org/0day-ci/archive/20241026/202410260742.a9vvkaEz-lkp@intel.com/config)
compiler: aarch64-linux-gcc (GCC) 14.1.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241026/202410260742.a9vvkaEz-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202410260742.a9vvkaEz-lkp@intel.com/
All errors (new ones prefixed by >>):
>> Error: arch/arm64/boot/dts/qcom/ipq9574.dtsi:766.16-17 syntax error
FATAL ERROR: Unable to parse input tree
On 26.10.2024 1:31 AM, kernel test robot wrote: > Hi Manikanta, > > kernel test robot noticed the following build errors: > > [auto build test ERROR on clk/clk-next] > [also build test ERROR on robh/for-next arm64/for-next/core linus/master v6.12-rc4 next-20241025] > [If your patch is applied to the wrong git tree, kindly drop us a note. > And when submitting patch, we suggest to use '--base' as documented in > https://git-scm.com/docs/git-format-patch#_base_tree_information] > > url: https://github.com/intel-lab-lkp/linux/commits/Manikanta-Mylavarapu/clk-qcom-clk-alpha-pll-Add-NSS-HUAYRA-ALPHA-PLL-support-for-ipq9574/20241025-121244 > base: https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next > patch link: https://lore.kernel.org/r/20241025035520.1841792-7-quic_mmanikan%40quicinc.com > patch subject: [PATCH v8 6/7] arm64: dts: qcom: ipq9574: Add nsscc node > config: arm64-randconfig-001-20241026 (https://download.01.org/0day-ci/archive/20241026/202410260742.a9vvkaEz-lkp@intel.com/config) > compiler: aarch64-linux-gcc (GCC) 14.1.0 > reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241026/202410260742.a9vvkaEz-lkp@intel.com/reproduce) > > If you fix the issue in a separate patch/commit (i.e. not just a new version of > the same patch/commit), kindly add following tags > | Reported-by: kernel test robot <lkp@intel.com> > | Closes: https://lore.kernel.org/oe-kbuild-all/202410260742.a9vvkaEz-lkp@intel.com/ > > All errors (new ones prefixed by >>): > >>> Error: arch/arm64/boot/dts/qcom/ipq9574.dtsi:766.16-17 syntax error > FATAL ERROR: Unable to parse input tree I believe you also need to include <dt-bindings/clock/qcom,ipq-cmn-pll.h> Konrad
diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi index 93f66bb83c5a..34f3510ea7ec 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi @@ -12,6 +12,8 @@ #include <dt-bindings/interconnect/qcom,ipq9574.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/reset/qcom,ipq9574-gcc.h> +#include <dt-bindings/clock/qcom,ipq9574-nsscc.h> +#include <dt-bindings/reset/qcom,ipq9574-nsscc.h> #include <dt-bindings/thermal/thermal.h> / { @@ -774,6 +776,26 @@ frame@b128000 { status = "disabled"; }; }; + + nsscc: clock-controller@39b00000 { + compatible = "qcom,ipq9574-nsscc"; + reg = <0x39b00000 0x80000>; + clocks = <&xo_board_clk>, + <&cmn_pll NSS_1200MHZ_CLK>, + <&cmn_pll PPE_353MHZ_CLK>, + <&gcc GPLL0_OUT_AUX>, + <0>, + <0>, + <0>, + <0>, + <0>, + <0>, + <&gcc GCC_NSSCC_CLK>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + #interconnect-cells = <1>; + }; }; thermal-zones {