| Message ID | 20241024-qcs8300-mm-patches-v2-1-76c905060d0a@quicinc.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Add support for GPUCC, CAMCC and VIDEOCC on Qualcomm QCS8300 platform | expand |
On Thu, Oct 24, 2024 at 07:01:14PM +0530, Imran Shaik wrote: > The QCS8300 GPU clock controller is mostly identical to SA8775P, but > QCS8300 has few additional clocks and minor differences. Hence, reuse > SA8775P gpucc bindings and add additional clocks required for QCS8300. IIUC, these clocks are not valid for SA8775p. How do we deal with such cases for other Qualcomm SoCs? Best regards, Krzysztof
On 10/26/2024 5:50 PM, Krzysztof Kozlowski wrote: > On Thu, Oct 24, 2024 at 07:01:14PM +0530, Imran Shaik wrote: >> The QCS8300 GPU clock controller is mostly identical to SA8775P, but >> QCS8300 has few additional clocks and minor differences. Hence, reuse >> SA8775P gpucc bindings and add additional clocks required for QCS8300. > > IIUC, these clocks are not valid for SA8775p. How do we deal with such > cases for other Qualcomm SoCs? > These newly added clocks are not applicable to SA8755P. In the gpucc-sa8775p driver, these clocks are marked to NULL for the SA8755P, ensuring they are not registered to the CCF. Thanks, Imran > Best regards, > Krzysztof >
On 28/10/2024 06:15, Imran Shaik wrote: > > > On 10/26/2024 5:50 PM, Krzysztof Kozlowski wrote: >> On Thu, Oct 24, 2024 at 07:01:14PM +0530, Imran Shaik wrote: >>> The QCS8300 GPU clock controller is mostly identical to SA8775P, but >>> QCS8300 has few additional clocks and minor differences. Hence, reuse >>> SA8775P gpucc bindings and add additional clocks required for QCS8300. >> >> IIUC, these clocks are not valid for SA8775p. How do we deal with such >> cases for other Qualcomm SoCs? >> > > These newly added clocks are not applicable to SA8755P. In the > gpucc-sa8775p driver, these clocks are marked to NULL for the SA8755P, > ensuring they are not registered to the CCF. I meant bindings. And existing practice. Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml index 0858fd635282..b2b8a1e0297f 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml @@ -27,6 +27,7 @@ description: | properties: compatible: enum: + - qcom,qcs8300-gpucc - qcom,sdm845-gpucc - qcom,sa8775p-gpucc - qcom,sc7180-gpucc diff --git a/include/dt-bindings/clock/qcom,sa8775p-gpucc.h b/include/dt-bindings/clock/qcom,sa8775p-gpucc.h index a5fd784b1ea2..54eaaf1c4e52 100644 --- a/include/dt-bindings/clock/qcom,sa8775p-gpucc.h +++ b/include/dt-bindings/clock/qcom,sa8775p-gpucc.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ /* - * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022, 2024 Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2023, Linaro Limited */ @@ -31,6 +31,8 @@ #define GPU_CC_MEMNOC_GFX_CLK 20 #define GPU_CC_SLEEP_CLK 21 #define GPU_CC_XO_CLK_SRC 22 +#define GPU_CC_CX_ACCU_SHIFT_CLK 23 +#define GPU_CC_GX_ACCU_SHIFT_CLK 24 /* GPU_CC resets */ #define GPUCC_GPU_CC_ACD_BCR 0
The QCS8300 GPU clock controller is mostly identical to SA8775P, but QCS8300 has few additional clocks and minor differences. Hence, reuse SA8775P gpucc bindings and add additional clocks required for QCS8300. Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com> --- Documentation/devicetree/bindings/clock/qcom,gpucc.yaml | 1 + include/dt-bindings/clock/qcom,sa8775p-gpucc.h | 4 +++- 2 files changed, 4 insertions(+), 1 deletion(-)