| Message ID | 20241029050030.1413662-1-animesh.manna@intel.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | [RFC] drm/i915/psr: Disable psr1 if setup_time > vblank | expand |
On Tue, 2024-10-29 at 10:30 +0530, Animesh Manna wrote: > Issue is seen when PSR enabled with setup frames and when try to > disable > PSR at SRDONACK State (0x1). PSR FSM is stuck at SRDONACK(0x1) for > more > than 5 seconds. Issue not seen with Setup frames disabled. Currently > disable psr1 if setuptime > vblank to workaround the above issue. > > HSD: 16024594674 > > Signed-off-by: Animesh Manna <animesh.manna@intel.com> > --- > drivers/gpu/drm/i915/display/intel_psr.c | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c > b/drivers/gpu/drm/i915/display/intel_psr.c > index 4176163ec19a..887fa8a8f878 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr.c > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > @@ -1640,6 +1640,15 @@ _panel_replay_compute_config(struct intel_dp > *intel_dp, > return true; > } > > +static bool intel_psr_needs_wa_18037818876(struct intel_dp > *intel_dp, > + struct intel_crtc_state > *crtc_state) > +{ > + struct intel_display *display = to_intel_display(intel_dp); > + > + return ((DISPLAY_VER(display) == 20) && intel_dp- > >psr.entry_setup_frames > 0 && > + !crtc_state->has_sel_update); > +} > + > void intel_psr_compute_config(struct intel_dp *intel_dp, > struct intel_crtc_state *crtc_state, > struct drm_connector_state *conn_state) > @@ -1686,6 +1695,10 @@ void intel_psr_compute_config(struct intel_dp > *intel_dp, > return; > > crtc_state->has_sel_update = > intel_sel_update_config_valid(intel_dp, crtc_state); > + > + /* Wa_18037818876 */ > + if (intel_psr_needs_wa_18037818876(intel_dp, crtc_state)) > + crtc_state->has_psr = false; > } Patch looks ok to me. Maybe some debug printout would make sense? BR, Jouni Högander > > void intel_psr_get_config(struct intel_encoder *encoder,
> -----Original Message----- > From: Hogander, Jouni <jouni.hogander@intel.com> > Sent: Tuesday, October 29, 2024 12:36 PM > To: Manna, Animesh <animesh.manna@intel.com>; intel- > gfx@lists.freedesktop.org > Subject: Re: [RFC] drm/i915/psr: Disable psr1 if setup_time > vblank > > On Tue, 2024-10-29 at 10:30 +0530, Animesh Manna wrote: > > Issue is seen when PSR enabled with setup frames and when try to > > disable PSR at SRDONACK State (0x1). PSR FSM is stuck at SRDONACK(0x1) > > for more than 5 seconds. Issue not seen with Setup frames disabled. > > Currently disable psr1 if setuptime > vblank to workaround the above > > issue. > > > > HSD: 16024594674 > > > > Signed-off-by: Animesh Manna <animesh.manna@intel.com> > > --- > > drivers/gpu/drm/i915/display/intel_psr.c | 13 +++++++++++++ > > 1 file changed, 13 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c > > b/drivers/gpu/drm/i915/display/intel_psr.c > > index 4176163ec19a..887fa8a8f878 100644 > > --- a/drivers/gpu/drm/i915/display/intel_psr.c > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > > @@ -1640,6 +1640,15 @@ _panel_replay_compute_config(struct intel_dp > > *intel_dp, > > return true; > > } > > > > +static bool intel_psr_needs_wa_18037818876(struct intel_dp > > *intel_dp, > > + struct intel_crtc_state > > *crtc_state) > > +{ > > + struct intel_display *display = to_intel_display(intel_dp); > > + > > + return ((DISPLAY_VER(display) == 20) && intel_dp- > > >psr.entry_setup_frames > 0 && > > + !crtc_state->has_sel_update); } > > + > > void intel_psr_compute_config(struct intel_dp *intel_dp, > > struct intel_crtc_state *crtc_state, > > struct drm_connector_state *conn_state) > > @@ -1686,6 +1695,10 @@ void intel_psr_compute_config(struct intel_dp > > *intel_dp, > > return; > > > > crtc_state->has_sel_update = > > intel_sel_update_config_valid(intel_dp, crtc_state); > > + > > + /* Wa_18037818876 */ > > + if (intel_psr_needs_wa_18037818876(intel_dp, crtc_state)) > > + crtc_state->has_psr = false; > > } > > Patch looks ok to me. Maybe some debug printout would make sense? Sure, will add in next version. Regards, Animesh > > BR, > > Jouni Högander > > > > void intel_psr_get_config(struct intel_encoder *encoder,
On Tue, 29 Oct 2024, Animesh Manna <animesh.manna@intel.com> wrote: > Issue is seen when PSR enabled with setup frames and when try to disable > PSR at SRDONACK State (0x1). PSR FSM is stuck at SRDONACK(0x1) for more > than 5 seconds. Issue not seen with Setup frames disabled. Currently > disable psr1 if setuptime > vblank to workaround the above issue. > > HSD: 16024594674 > > Signed-off-by: Animesh Manna <animesh.manna@intel.com> > --- > drivers/gpu/drm/i915/display/intel_psr.c | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c > index 4176163ec19a..887fa8a8f878 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr.c > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > @@ -1640,6 +1640,15 @@ _panel_replay_compute_config(struct intel_dp *intel_dp, > return true; > } > > +static bool intel_psr_needs_wa_18037818876(struct intel_dp *intel_dp, > + struct intel_crtc_state *crtc_state) > +{ > + struct intel_display *display = to_intel_display(intel_dp); > + > + return ((DISPLAY_VER(display) == 20) && intel_dp->psr.entry_setup_frames > 0 && > + !crtc_state->has_sel_update); Excessive parentheses both around the display ver check as well as the whole thing. BR, Jani. > +} > + > void intel_psr_compute_config(struct intel_dp *intel_dp, > struct intel_crtc_state *crtc_state, > struct drm_connector_state *conn_state) > @@ -1686,6 +1695,10 @@ void intel_psr_compute_config(struct intel_dp *intel_dp, > return; > > crtc_state->has_sel_update = intel_sel_update_config_valid(intel_dp, crtc_state); > + > + /* Wa_18037818876 */ > + if (intel_psr_needs_wa_18037818876(intel_dp, crtc_state)) > + crtc_state->has_psr = false; > } > > void intel_psr_get_config(struct intel_encoder *encoder,
> -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Animesh > Manna > Sent: Tuesday, October 29, 2024 10:31 AM > To: intel-gfx@lists.freedesktop.org > Cc: Hogander, Jouni <jouni.hogander@intel.com>; Manna, Animesh > <animesh.manna@intel.com> > Subject: [RFC] drm/i915/psr: Disable psr1 if setup_time > vblank > > Issue is seen when PSR enabled with setup frames and when try to disable PSR at > SRDONACK State (0x1). PSR FSM is stuck at SRDONACK(0x1) for more than 5 > seconds. Issue not seen with Setup frames disabled. Currently disable psr1 if > setuptime > vblank to workaround the above issue. > > HSD: 16024594674 In the commit message also mention the wa number instead of HSD number. > > Signed-off-by: Animesh Manna <animesh.manna@intel.com> > --- > drivers/gpu/drm/i915/display/intel_psr.c | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c > b/drivers/gpu/drm/i915/display/intel_psr.c > index 4176163ec19a..887fa8a8f878 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr.c > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > @@ -1640,6 +1640,15 @@ _panel_replay_compute_config(struct intel_dp > *intel_dp, > return true; > } > > +static bool intel_psr_needs_wa_18037818876(struct intel_dp *intel_dp, > + struct intel_crtc_state *crtc_state) { > + struct intel_display *display = to_intel_display(intel_dp); > + > + return ((DISPLAY_VER(display) == 20) && intel_dp- > >psr.entry_setup_frames > 0 && > + !crtc_state->has_sel_update); > +} > + As this WA is applicable for LNL platform only so does it make sense to use DISPLAY_VER_FULL(i915) == IP_VER(20, 0) instead of DISPLAY_VER(display) == 20. Thanks and Regards, Nemesa > void intel_psr_compute_config(struct intel_dp *intel_dp, > struct intel_crtc_state *crtc_state, > struct drm_connector_state *conn_state) @@ - > 1686,6 +1695,10 @@ void intel_psr_compute_config(struct intel_dp *intel_dp, > return; > > crtc_state->has_sel_update = intel_sel_update_config_valid(intel_dp, > crtc_state); > + > + /* Wa_18037818876 */ > + if (intel_psr_needs_wa_18037818876(intel_dp, crtc_state)) > + crtc_state->has_psr = false; > } > > void intel_psr_get_config(struct intel_encoder *encoder, > -- > 2.29.0
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 4176163ec19a..887fa8a8f878 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1640,6 +1640,15 @@ _panel_replay_compute_config(struct intel_dp *intel_dp, return true; } +static bool intel_psr_needs_wa_18037818876(struct intel_dp *intel_dp, + struct intel_crtc_state *crtc_state) +{ + struct intel_display *display = to_intel_display(intel_dp); + + return ((DISPLAY_VER(display) == 20) && intel_dp->psr.entry_setup_frames > 0 && + !crtc_state->has_sel_update); +} + void intel_psr_compute_config(struct intel_dp *intel_dp, struct intel_crtc_state *crtc_state, struct drm_connector_state *conn_state) @@ -1686,6 +1695,10 @@ void intel_psr_compute_config(struct intel_dp *intel_dp, return; crtc_state->has_sel_update = intel_sel_update_config_valid(intel_dp, crtc_state); + + /* Wa_18037818876 */ + if (intel_psr_needs_wa_18037818876(intel_dp, crtc_state)) + crtc_state->has_psr = false; } void intel_psr_get_config(struct intel_encoder *encoder,
Issue is seen when PSR enabled with setup frames and when try to disable PSR at SRDONACK State (0x1). PSR FSM is stuck at SRDONACK(0x1) for more than 5 seconds. Issue not seen with Setup frames disabled. Currently disable psr1 if setuptime > vblank to workaround the above issue. HSD: 16024594674 Signed-off-by: Animesh Manna <animesh.manna@intel.com> --- drivers/gpu/drm/i915/display/intel_psr.c | 13 +++++++++++++ 1 file changed, 13 insertions(+)