diff mbox series

[10/14] x86/mpx: Map/unmap xsave area in in read_bndcfgu()

Message ID 20241028154932.6797-11-alejandro.vallejo@cloud.com (mailing list archive)
State New
Headers show
Series x86: Address Space Isolation FPU preparations | expand

Commit Message

Alejandro Vallejo Oct. 28, 2024, 3:49 p.m. UTC 
No functional change.

Signed-off-by: Alejandro Vallejo <alejandro.vallejo@cloud.com>
---
 xen/arch/x86/xstate.c | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

Comments

Jan Beulich Oct. 29, 2024, 8:27 a.m. UTC | #1 
On 28.10.2024 16:49, Alejandro Vallejo wrote:
> --- a/xen/arch/x86/xstate.c
> +++ b/xen/arch/x86/xstate.c
> @@ -1021,9 +1021,10 @@ int handle_xsetbv(u32 index, u64 new_bv)
>  
>  uint64_t read_bndcfgu(void)
>  {
> +    uint64_t ret = 0;

Seeing the purpose of the variable, imo it would better be named bndcfgu.

Jan

>      unsigned long cr0 = read_cr0();
> -    struct xsave_struct *xstate
> -        = idle_vcpu[smp_processor_id()]->arch.xsave_area;
> +    struct vcpu *v = idle_vcpu[smp_processor_id()];
> +    struct xsave_struct *xstate = vcpu_map_xsave_area(v);
>      const struct xstate_bndcsr *bndcsr;
>  
>      ASSERT(cpu_has_mpx);
> @@ -1049,7 +1050,12 @@ uint64_t read_bndcfgu(void)
>      if ( cr0 & X86_CR0_TS )
>          write_cr0(cr0);
>  
> -    return xstate->xsave_hdr.xstate_bv & X86_XCR0_BNDCSR ? bndcsr->bndcfgu : 0;
> +    if ( xstate->xsave_hdr.xstate_bv & X86_XCR0_BNDCSR )
> +        ret = bndcsr->bndcfgu;
> +
> +    vcpu_unmap_xsave_area(v, xstate);
> +
> +    return ret;
>  }
>  
>  void xstate_set_init(uint64_t mask)
diff mbox series

Patch

diff --git a/xen/arch/x86/xstate.c b/xen/arch/x86/xstate.c
index 4019ca4aae83..2a54da2823cf 100644
--- a/xen/arch/x86/xstate.c
+++ b/xen/arch/x86/xstate.c
@@ -1021,9 +1021,10 @@  int handle_xsetbv(u32 index, u64 new_bv)
 
 uint64_t read_bndcfgu(void)
 {
+    uint64_t ret = 0;
     unsigned long cr0 = read_cr0();
-    struct xsave_struct *xstate
-        = idle_vcpu[smp_processor_id()]->arch.xsave_area;
+    struct vcpu *v = idle_vcpu[smp_processor_id()];
+    struct xsave_struct *xstate = vcpu_map_xsave_area(v);
     const struct xstate_bndcsr *bndcsr;
 
     ASSERT(cpu_has_mpx);
@@ -1049,7 +1050,12 @@  uint64_t read_bndcfgu(void)
     if ( cr0 & X86_CR0_TS )
         write_cr0(cr0);
 
-    return xstate->xsave_hdr.xstate_bv & X86_XCR0_BNDCSR ? bndcsr->bndcfgu : 0;
+    if ( xstate->xsave_hdr.xstate_bv & X86_XCR0_BNDCSR )
+        ret = bndcsr->bndcfgu;
+
+    vcpu_unmap_xsave_area(v, xstate);
+
+    return ret;
 }
 
 void xstate_set_init(uint64_t mask)