mbox series

[v3,0/4] Implement Wa_14022698537

Message ID 20241030143418.410406-1-raag.jadav@intel.com (mailing list archive)
Headers show
Series Implement Wa_14022698537 | expand

Message

Raag Jadav Oct. 30, 2024, 2:34 p.m. UTC
This series implements Wa_14022698537 for DG2 along with its prerequisites
in i915. Now that we have a common pciids.h in place, this can be extended
to xe as well. Detailed description in commit message.

v1: https://patchwork.freedesktop.org/series/139628/

v2: Introduce DG2_WA subplatform for workaround (Jani)
    Fix Wa_ID and include it in subject (Badal)
    Rephrase commit message (Jani)
    Move CPU whitelist to intel_wa_cpu.c

v3: Rework subplatform naming (Jani)
    Move CPU file out of gt directory (Riana)
    Rephrase CPU file description (Jani)
    Add kernel doc, re-order macro (Riana)
    Move workaround to i915_pcode_init() (Badal, Anshuman)

Raag Jadav (4):
  drm/intel/pciids: Refactor DG2 PCI IDs into segment ranges
  drm/i915/dg2: Introduce DG2_D subplatform
  drm/i915: Introduce intel_cpu_info.c for CPU IDs
  drm/i915/dg2: Implement Wa_14022698537

 drivers/gpu/drm/i915/Makefile            |  1 +
 drivers/gpu/drm/i915/i915_driver.c       | 15 +++++++
 drivers/gpu/drm/i915/i915_drv.h          |  2 +
 drivers/gpu/drm/i915/i915_reg.h          |  1 +
 drivers/gpu/drm/i915/intel_cpu_info.c    | 42 ++++++++++++++++++
 drivers/gpu/drm/i915/intel_cpu_info.h    | 13 ++++++
 drivers/gpu/drm/i915/intel_device_info.c |  9 ++++
 drivers/gpu/drm/i915/intel_device_info.h |  5 ++-
 include/drm/intel/pciids.h               | 55 ++++++++++++++++++------
 9 files changed, 129 insertions(+), 14 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/intel_cpu_info.c
 create mode 100644 drivers/gpu/drm/i915/intel_cpu_info.h

Comments

Jani Nikula Oct. 30, 2024, 6:40 p.m. UTC | #1
On Wed, 30 Oct 2024, Raag Jadav <raag.jadav@intel.com> wrote:
> This series implements Wa_14022698537 for DG2 along with its prerequisites
> in i915. Now that we have a common pciids.h in place, this can be extended
> to xe as well. Detailed description in commit message.

Okay, so this bumps the requirements during development, but where's the
implementation for xe? What's it going to look like?

BR,
Jani.



>
> v1: https://patchwork.freedesktop.org/series/139628/
>
> v2: Introduce DG2_WA subplatform for workaround (Jani)
>     Fix Wa_ID and include it in subject (Badal)
>     Rephrase commit message (Jani)
>     Move CPU whitelist to intel_wa_cpu.c
>
> v3: Rework subplatform naming (Jani)
>     Move CPU file out of gt directory (Riana)
>     Rephrase CPU file description (Jani)
>     Add kernel doc, re-order macro (Riana)
>     Move workaround to i915_pcode_init() (Badal, Anshuman)
>
> Raag Jadav (4):
>   drm/intel/pciids: Refactor DG2 PCI IDs into segment ranges
>   drm/i915/dg2: Introduce DG2_D subplatform
>   drm/i915: Introduce intel_cpu_info.c for CPU IDs
>   drm/i915/dg2: Implement Wa_14022698537
>
>  drivers/gpu/drm/i915/Makefile            |  1 +
>  drivers/gpu/drm/i915/i915_driver.c       | 15 +++++++
>  drivers/gpu/drm/i915/i915_drv.h          |  2 +
>  drivers/gpu/drm/i915/i915_reg.h          |  1 +
>  drivers/gpu/drm/i915/intel_cpu_info.c    | 42 ++++++++++++++++++
>  drivers/gpu/drm/i915/intel_cpu_info.h    | 13 ++++++
>  drivers/gpu/drm/i915/intel_device_info.c |  9 ++++
>  drivers/gpu/drm/i915/intel_device_info.h |  5 ++-
>  include/drm/intel/pciids.h               | 55 ++++++++++++++++++------
>  9 files changed, 129 insertions(+), 14 deletions(-)
>  create mode 100644 drivers/gpu/drm/i915/intel_cpu_info.c
>  create mode 100644 drivers/gpu/drm/i915/intel_cpu_info.h
Raag Jadav Oct. 31, 2024, 8:59 a.m. UTC | #2
On Wed, Oct 30, 2024 at 08:40:50PM +0200, Jani Nikula wrote:
> On Wed, 30 Oct 2024, Raag Jadav <raag.jadav@intel.com> wrote:
> > This series implements Wa_14022698537 for DG2 along with its prerequisites
> > in i915. Now that we have a common pciids.h in place, this can be extended
> > to xe as well. Detailed description in commit message.
> 
> Okay, so this bumps the requirements during development, but where's the
> implementation for xe? What's it going to look like?

The requirement is only for i915. What I mean here is, if the requirement
arises for xe in the future, this *can* be implemented without significant
refactoring now that we have a common pciids.h in place.

I know it's not the best choice of words but I thought you wouldn't mind :)

Raag