diff mbox series

arm64: dts: ti: k3-am642-evm: Add dt overlay to disable icssg for Linux

Message ID 20241030114458.1358800-1-danishanwar@ti.com (mailing list archive)
State New
Headers show
Series arm64: dts: ti: k3-am642-evm: Add dt overlay to disable icssg for Linux | expand

Commit Message

MD Danish Anwar Oct. 30, 2024, 11:44 a.m. UTC
Add k3-am642-evm-icssg1-disable.dtso overlay file that disables
icssg1-eth from Linux so that icssg peripherals can be used by
RTOS or some other OS running on R5 core.

Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
---
 arch/arm64/boot/dts/ti/Makefile               |  7 +--
 .../dts/ti/k3-am642-evm-icssg1-disable.dtso   | 49 +++++++++++++++++++
 2 files changed, 53 insertions(+), 3 deletions(-)
 create mode 100644 arch/arm64/boot/dts/ti/k3-am642-evm-icssg1-disable.dtso

Comments

Roger Quadros Oct. 31, 2024, 10:53 a.m. UTC | #1
Hi Danish,

On 30/10/2024 13:44, MD Danish Anwar wrote:
> Add k3-am642-evm-icssg1-disable.dtso overlay file that disables
> icssg1-eth from Linux so that icssg peripherals can be used by
> RTOS or some other OS running on R5 core.
> 
> Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
> ---
>  arch/arm64/boot/dts/ti/Makefile               |  7 +--
>  .../dts/ti/k3-am642-evm-icssg1-disable.dtso   | 49 +++++++++++++++++++
>  2 files changed, 53 insertions(+), 3 deletions(-)
>  create mode 100644 arch/arm64/boot/dts/ti/k3-am642-evm-icssg1-disable.dtso
> 
> diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
> index 6bd06bd76b68..0fd95b7df5a8 100644
> --- a/arch/arm64/boot/dts/ti/Makefile
> +++ b/arch/arm64/boot/dts/ti/Makefile
> @@ -76,6 +76,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am642-evm.dtb
>  dtb-$(CONFIG_ARCH_K3) += k3-am642-evm-nand.dtbo
>  dtb-$(CONFIG_ARCH_K3) += k3-am642-evm-icssg1-dualemac.dtbo
>  dtb-$(CONFIG_ARCH_K3) += k3-am642-evm-icssg1-dualemac-mii.dtbo
> +dtb-$(CONFIG_ARCH_K3) += k3-am642-evm-icssg1-disable.dtbo
>  dtb-$(CONFIG_ARCH_K3) += k3-am642-evm-pcie0-ep.dtbo
>  dtb-$(CONFIG_ARCH_K3) += k3-am642-phyboard-electra-rdk.dtb
>  dtb-$(CONFIG_ARCH_K3) += k3-am642-sk.dtb
> @@ -235,8 +236,8 @@ k3-am62p5-sk-microtips-mf103hie-lcd2-dtbs := k3-am62p5-sk.dtb \
>  	k3-am62p5-sk-microtips-mf103hie-lcd2.dtbo
>  k3-am642-evm-icssg1-dualemac-dtbs := \
>  	k3-am642-evm.dtb k3-am642-evm-icssg1-dualemac.dtbo
> -k3-am642-evm-icssg1-dualemac-mii-dtbs := \
> -	k3-am642-evm.dtb k3-am642-evm-icssg1-dualemac-mii.dtbo
> +k3-am642-evm-icssg1-disable-dtbs := \
> +	k3-am642-evm.dtb k3-am642-evm-icssg1-disable.dtbo
>  k3-am642-evm-pcie0-ep-dtbs := \
>  	k3-am642-evm.dtb k3-am642-evm-pcie0-ep.dtbo
>  k3-am642-tqma64xxl-mbax4xxl-sdcard-dtbs := \
> @@ -323,7 +324,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \
>  	k3-am62p5-sk-microtips-mf101hie-panel.dtb \
>  	k3-am62p5-sk-microtips-mf103hie-lcd2.dtb \
>  	k3-am642-evm-icssg1-dualemac.dtb \
> -	k3-am642-evm-icssg1-dualemac-mii.dtb \
> +	k3-am642-evm-icssg1-disable.dtb \
>  	k3-am642-evm-pcie0-ep.dtb \
>  	k3-am642-tqma64xxl-mbax4xxl-sdcard.dtb \
>  	k3-am642-tqma64xxl-mbax4xxl-wlan.dtb \
> diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm-icssg1-disable.dtso b/arch/arm64/boot/dts/ti/k3-am642-evm-icssg1-disable.dtso
> new file mode 100644
> index 000000000000..dc04e2999e97
> --- /dev/null
> +++ b/arch/arm64/boot/dts/ti/k3-am642-evm-icssg1-disable.dtso
> @@ -0,0 +1,49 @@
> +// SPDX-License-Identifier: GPL-2.0-only OR MIT
> +/**
> + * DT overlay for enabling 2nd ICSSG1 port on AM642 EVM
> + *
> + * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
> + */
> +
> +/dts-v1/;
> +/plugin/;
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include "k3-pinctrl.h"
> +
> +&oc_sram {
> +	#address-cells = <1>;
> +	#size-cells = <1>;
> +
> +	r5f0_0_sram: r5f0_0_sram@0 {
> +		reg = <0x0 0x180000>;
> +	};
> +};> +
> +&main_r5fss0_core0 {
> +	sram = <&r5f0_0_sram>;
> +};
> +

You need to mention why this change is done, in the commit log.

> +&cpsw_port2 {
> +	status = "disabled";
> +};
> +
> +&icssg0 {
> +	status = "disabled";
> +};

dtso name says icssg1-disabel but you are disabling icssg0 as well?

> +
> +&icssg1 {
> +	status = "disabled";
> +};
> +
> +&ospi0 {
> +	status = "disabled";
> +};

and ospi0?

> +
> +&mdio_mux_1 {
> +	status = "disabled";
> +};
> +
> +&icssg1_eth {
> +	status = "disabled";
> +};

Maybe the dtso is poorly named and should be called something else so that is correctly reflects the use case?
I suppose it has something to do with peripherals reserved for R5 core?

e.g.

k3-am642-evm-r5-reserved.dtso?

How is this dtso applied at boot?
Andrew Davis Oct. 31, 2024, 4:39 p.m. UTC | #2
On 10/30/24 6:44 AM, MD Danish Anwar wrote:
> Add k3-am642-evm-icssg1-disable.dtso overlay file that disables
> icssg1-eth from Linux so that icssg peripherals can be used by
> RTOS or some other OS running on R5 core.
> 

That was the point of putting icssg1-eth in its own overlay,
if you don't want to use ICSSG1 for Ethernet, just don't apply
k3-am642-evm-icssg1-dualemac.dtbo.

Andrew

> Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
> ---
>   arch/arm64/boot/dts/ti/Makefile               |  7 +--
>   .../dts/ti/k3-am642-evm-icssg1-disable.dtso   | 49 +++++++++++++++++++
>   2 files changed, 53 insertions(+), 3 deletions(-)
>   create mode 100644 arch/arm64/boot/dts/ti/k3-am642-evm-icssg1-disable.dtso
> 
> diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
> index 6bd06bd76b68..0fd95b7df5a8 100644
> --- a/arch/arm64/boot/dts/ti/Makefile
> +++ b/arch/arm64/boot/dts/ti/Makefile
> @@ -76,6 +76,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am642-evm.dtb
>   dtb-$(CONFIG_ARCH_K3) += k3-am642-evm-nand.dtbo
>   dtb-$(CONFIG_ARCH_K3) += k3-am642-evm-icssg1-dualemac.dtbo
>   dtb-$(CONFIG_ARCH_K3) += k3-am642-evm-icssg1-dualemac-mii.dtbo
> +dtb-$(CONFIG_ARCH_K3) += k3-am642-evm-icssg1-disable.dtbo
>   dtb-$(CONFIG_ARCH_K3) += k3-am642-evm-pcie0-ep.dtbo
>   dtb-$(CONFIG_ARCH_K3) += k3-am642-phyboard-electra-rdk.dtb
>   dtb-$(CONFIG_ARCH_K3) += k3-am642-sk.dtb
> @@ -235,8 +236,8 @@ k3-am62p5-sk-microtips-mf103hie-lcd2-dtbs := k3-am62p5-sk.dtb \
>   	k3-am62p5-sk-microtips-mf103hie-lcd2.dtbo
>   k3-am642-evm-icssg1-dualemac-dtbs := \
>   	k3-am642-evm.dtb k3-am642-evm-icssg1-dualemac.dtbo
> -k3-am642-evm-icssg1-dualemac-mii-dtbs := \
> -	k3-am642-evm.dtb k3-am642-evm-icssg1-dualemac-mii.dtbo
> +k3-am642-evm-icssg1-disable-dtbs := \
> +	k3-am642-evm.dtb k3-am642-evm-icssg1-disable.dtbo
>   k3-am642-evm-pcie0-ep-dtbs := \
>   	k3-am642-evm.dtb k3-am642-evm-pcie0-ep.dtbo
>   k3-am642-tqma64xxl-mbax4xxl-sdcard-dtbs := \
> @@ -323,7 +324,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \
>   	k3-am62p5-sk-microtips-mf101hie-panel.dtb \
>   	k3-am62p5-sk-microtips-mf103hie-lcd2.dtb \
>   	k3-am642-evm-icssg1-dualemac.dtb \
> -	k3-am642-evm-icssg1-dualemac-mii.dtb \
> +	k3-am642-evm-icssg1-disable.dtb \
>   	k3-am642-evm-pcie0-ep.dtb \
>   	k3-am642-tqma64xxl-mbax4xxl-sdcard.dtb \
>   	k3-am642-tqma64xxl-mbax4xxl-wlan.dtb \
> diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm-icssg1-disable.dtso b/arch/arm64/boot/dts/ti/k3-am642-evm-icssg1-disable.dtso
> new file mode 100644
> index 000000000000..dc04e2999e97
> --- /dev/null
> +++ b/arch/arm64/boot/dts/ti/k3-am642-evm-icssg1-disable.dtso
> @@ -0,0 +1,49 @@
> +// SPDX-License-Identifier: GPL-2.0-only OR MIT
> +/**
> + * DT overlay for enabling 2nd ICSSG1 port on AM642 EVM
> + *
> + * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
> + */
> +
> +/dts-v1/;
> +/plugin/;
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include "k3-pinctrl.h"
> +
> +&oc_sram {
> +	#address-cells = <1>;
> +	#size-cells = <1>;
> +
> +	r5f0_0_sram: r5f0_0_sram@0 {
> +		reg = <0x0 0x180000>;
> +	};
> +};
> +
> +&main_r5fss0_core0 {
> +	sram = <&r5f0_0_sram>;
> +};
> +
> +&cpsw_port2 {
> +	status = "disabled";
> +};
> +
> +&icssg0 {
> +	status = "disabled";
> +};
> +
> +&icssg1 {
> +	status = "disabled";
> +};
> +
> +&ospi0 {
> +	status = "disabled";
> +};
> +
> +&mdio_mux_1 {
> +	status = "disabled";
> +};
> +
> +&icssg1_eth {
> +	status = "disabled";
> +};
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
index 6bd06bd76b68..0fd95b7df5a8 100644
--- a/arch/arm64/boot/dts/ti/Makefile
+++ b/arch/arm64/boot/dts/ti/Makefile
@@ -76,6 +76,7 @@  dtb-$(CONFIG_ARCH_K3) += k3-am642-evm.dtb
 dtb-$(CONFIG_ARCH_K3) += k3-am642-evm-nand.dtbo
 dtb-$(CONFIG_ARCH_K3) += k3-am642-evm-icssg1-dualemac.dtbo
 dtb-$(CONFIG_ARCH_K3) += k3-am642-evm-icssg1-dualemac-mii.dtbo
+dtb-$(CONFIG_ARCH_K3) += k3-am642-evm-icssg1-disable.dtbo
 dtb-$(CONFIG_ARCH_K3) += k3-am642-evm-pcie0-ep.dtbo
 dtb-$(CONFIG_ARCH_K3) += k3-am642-phyboard-electra-rdk.dtb
 dtb-$(CONFIG_ARCH_K3) += k3-am642-sk.dtb
@@ -235,8 +236,8 @@  k3-am62p5-sk-microtips-mf103hie-lcd2-dtbs := k3-am62p5-sk.dtb \
 	k3-am62p5-sk-microtips-mf103hie-lcd2.dtbo
 k3-am642-evm-icssg1-dualemac-dtbs := \
 	k3-am642-evm.dtb k3-am642-evm-icssg1-dualemac.dtbo
-k3-am642-evm-icssg1-dualemac-mii-dtbs := \
-	k3-am642-evm.dtb k3-am642-evm-icssg1-dualemac-mii.dtbo
+k3-am642-evm-icssg1-disable-dtbs := \
+	k3-am642-evm.dtb k3-am642-evm-icssg1-disable.dtbo
 k3-am642-evm-pcie0-ep-dtbs := \
 	k3-am642-evm.dtb k3-am642-evm-pcie0-ep.dtbo
 k3-am642-tqma64xxl-mbax4xxl-sdcard-dtbs := \
@@ -323,7 +324,7 @@  dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \
 	k3-am62p5-sk-microtips-mf101hie-panel.dtb \
 	k3-am62p5-sk-microtips-mf103hie-lcd2.dtb \
 	k3-am642-evm-icssg1-dualemac.dtb \
-	k3-am642-evm-icssg1-dualemac-mii.dtb \
+	k3-am642-evm-icssg1-disable.dtb \
 	k3-am642-evm-pcie0-ep.dtb \
 	k3-am642-tqma64xxl-mbax4xxl-sdcard.dtb \
 	k3-am642-tqma64xxl-mbax4xxl-wlan.dtb \
diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm-icssg1-disable.dtso b/arch/arm64/boot/dts/ti/k3-am642-evm-icssg1-disable.dtso
new file mode 100644
index 000000000000..dc04e2999e97
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-am642-evm-icssg1-disable.dtso
@@ -0,0 +1,49 @@ 
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/**
+ * DT overlay for enabling 2nd ICSSG1 port on AM642 EVM
+ *
+ * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include "k3-pinctrl.h"
+
+&oc_sram {
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	r5f0_0_sram: r5f0_0_sram@0 {
+		reg = <0x0 0x180000>;
+	};
+};
+
+&main_r5fss0_core0 {
+	sram = <&r5f0_0_sram>;
+};
+
+&cpsw_port2 {
+	status = "disabled";
+};
+
+&icssg0 {
+	status = "disabled";
+};
+
+&icssg1 {
+	status = "disabled";
+};
+
+&ospi0 {
+	status = "disabled";
+};
+
+&mdio_mux_1 {
+	status = "disabled";
+};
+
+&icssg1_eth {
+	status = "disabled";
+};