| Message ID | 20241104063559.727228-1-tao1.su@linux.intel.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | Advertise CPUID for new instructions in Clearwater Forest | expand |
On Mon, Nov 04, 2024 at 02:35:55PM +0800, Tao Su wrote: > Latest Intel platform Clearwater Forest has introduced new instructions > for SHA512, SM3, SM4 and AVX-VNNI-INT16. > > This patch set is for advertising these CPUIDs to userspace so that guests > can query them directly. Since these new instructions can't be intercepted > and only use xmm, ymm registers, host doesn't require to do additional > enabling for guest. > > These new instructions are already updated into SDM [1]. > > --- > [1] https://cdrdv2.intel.com/v1/dl/getContent/671200 I'm willing to bet some money that this URL will become invalid in a while. > Tao Su (4): > x86: KVM: Advertise SHA512 CPUID to userspace > x86: KVM: Advertise SM3 CPUID to userspace > x86: KVM: Advertise SM4 CPUID to userspace > KVM: x86: Advertise AVX-VNNI-INT16 CPUID to userspace Why aren't those a single patch instead of 4 very similar ones?
On Mon, Nov 04, 2024 at 07:51:47AM +0100, Borislav Petkov wrote: > On Mon, Nov 04, 2024 at 02:35:55PM +0800, Tao Su wrote: > > Latest Intel platform Clearwater Forest has introduced new instructions > > for SHA512, SM3, SM4 and AVX-VNNI-INT16. > > > > This patch set is for advertising these CPUIDs to userspace so that guests > > can query them directly. Since these new instructions can't be intercepted > > and only use xmm, ymm registers, host doesn't require to do additional > > enabling for guest. > > > > These new instructions are already updated into SDM [1]. > > > > --- > > [1] https://cdrdv2.intel.com/v1/dl/getContent/671200 > > I'm willing to bet some money that this URL will become invalid in a while. > Thanks for such a quick review. Yes, the link may be invalid. Would it be better if I attach rev, chapter and section? > > Tao Su (4): > > x86: KVM: Advertise SHA512 CPUID to userspace > > x86: KVM: Advertise SM3 CPUID to userspace > > x86: KVM: Advertise SM4 CPUID to userspace > > KVM: x86: Advertise AVX-VNNI-INT16 CPUID to userspace > > Why aren't those a single patch instead of 4 very similar ones? > I mainly referred to the previous patch set [*] which is very similar to this one. If you think a patch is better, I can send a v2 with only one patch. [*] https://lore.kernel.org/all/20221125125845.1182922-1-jiaxi.chen@linux.intel.com/
On Mon, Nov 04, 2024 at 03:04:41PM +0800, Tao Su wrote: > Would it be better if I attach rev, chapter and section? Put enough information from the document so that one can find it doing a web search. So that even if the vendor URL changes, a search engine will index it shortly after again. > I mainly referred to the previous patch set [*] which is very similar to > this one. That patch set is doing more than just adding bits although I still would've merged patches 3-8 as they're simply adding feature bits and are obvious. > If you think a patch is better, I can send a v2 with only one > patch. Yes please. Thx.
On Mon, Nov 04, 2024 at 10:58:34AM +0100, Borislav Petkov wrote: > On Mon, Nov 04, 2024 at 03:04:41PM +0800, Tao Su wrote: > > Would it be better if I attach rev, chapter and section? > > Put enough information from the document so that one can find it doing a web > search. So that even if the vendor URL changes, a search engine will index it > shortly after again. > Sure, I agree with you. > > I mainly referred to the previous patch set [*] which is very similar to > > this one. > > That patch set is doing more than just adding bits although I still would've > merged patches 3-8 as they're simply adding feature bits and are obvious. > Got it. > > If you think a patch is better, I can send a v2 with only one > > patch. > > Yes please. Will do, thanks!