| Message ID | 20241105082848.230020-1-pbonzini@redhat.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | target/i386: add avx-vnni-int16 feature | expand |
On Tue, Nov 05, 2024 at 09:28:48AM +0100, Paolo Bonzini wrote: > SHA512, SM3, SM4 (CPUID[EAX=7,ECX=1).EAX bits 0 to 2) is supported by > Clearwater Forest processor, add it to QEMU as it does not need any > specific enablement. > > See https://lore.kernel.org/kvm/20241105054825.870939-1-tao1.su@linux.intel.com/ > for reference. > > Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> The patch name is still for avx-vnni-int16. LGTM, Reviewed-by: Tao Su <tao1.su@linux.intel.com>
On 11/5/24 09:28, Paolo Bonzini wrote: > SHA512, SM3, SM4 (CPUID[EAX=7,ECX=1).EAX bits 0 to 2) is supported by > Clearwater Forest processor, add it to QEMU as it does not need any > specific enablement. > > See https://lore.kernel.org/kvm/20241105054825.870939-1-tao1.su@linux.intel.com/ > for reference. > > Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> > --- > target/i386/cpu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/target/i386/cpu.c b/target/i386/cpu.c > index 3baa95481fb..ae5b85f4e8e 100644 > --- a/target/i386/cpu.c > +++ b/target/i386/cpu.c > @@ -1113,7 +1113,7 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = { > [FEAT_7_1_EAX] = { > .type = CPUID_FEATURE_WORD, > .feat_names = { > - NULL, NULL, NULL, NULL, > + "sha512", "sm3", "sm4", NULL, > "avx-vnni", "avx512-bf16", NULL, "cmpccxadd", > NULL, NULL, "fzrm", "fsrs", > "fsrc", NULL, NULL, NULL, Obviously the subject is wrong, sorry about that. Paolo
diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 3baa95481fb..ae5b85f4e8e 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -1113,7 +1113,7 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = { [FEAT_7_1_EAX] = { .type = CPUID_FEATURE_WORD, .feat_names = { - NULL, NULL, NULL, NULL, + "sha512", "sm3", "sm4", NULL, "avx-vnni", "avx512-bf16", NULL, "cmpccxadd", NULL, NULL, "fzrm", "fsrs", "fsrc", NULL, NULL, NULL,
SHA512, SM3, SM4 (CPUID[EAX=7,ECX=1).EAX bits 0 to 2) is supported by Clearwater Forest processor, add it to QEMU as it does not need any specific enablement. See https://lore.kernel.org/kvm/20241105054825.870939-1-tao1.su@linux.intel.com/ for reference. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> --- target/i386/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)