diff mbox series

[03/21] dt-bindings: gpu: img: Power domain details

Message ID 20241105-sets-bxs-4-64-patch-v1-v1-3-4ed30e865892@imgtec.com (mailing list archive)
State New
Headers show
Series Imagination BXS-4-64 MC1 GPU support | expand

Commit Message

Matt Coster Nov. 5, 2024, 3:58 p.m. UTC
The single existing GPU (AXE-1-16M) only requires a single power domain.
Subsequent patches will add support for BXS-4-64 MC1, which has two power
domains. Add infrastructure now to allow for this.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
---
 .../devicetree/bindings/gpu/img,powervr-rogue.yaml | 29 +++++++++++++++++++++-
 1 file changed, 28 insertions(+), 1 deletion(-)

Comments

Conor Dooley Nov. 5, 2024, 6:05 p.m. UTC | #1
On Tue, Nov 05, 2024 at 03:58:09PM +0000, Matt Coster wrote:
> The single existing GPU (AXE-1-16M) only requires a single power domain.
> Subsequent patches will add support for BXS-4-64 MC1, which has two power
> domains. Add infrastructure now to allow for this.
> 
> Signed-off-by: Matt Coster <matt.coster@imgtec.com>
> ---
>  .../devicetree/bindings/gpu/img,powervr-rogue.yaml | 29 +++++++++++++++++++++-
>  1 file changed, 28 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
> index 6924831d3e9dd9b2b052ca8f9d7228ff25526532..55f422be1bc5b7564e3e81f24c4b93857f3e12fe 100644
> --- a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
> +++ b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
> @@ -49,7 +49,16 @@ properties:
>      maxItems: 1
>  
>    power-domains:
> -    maxItems: 1
> +    minItems: 1
> +    maxItems: 2
> +
> +  power-domain-names:
> +    oneOf:
> +      - items:
> +          - const: a
> +      - items:
> +          - const: a
> +          - const: b
>  
>  required:
>    - compatible
> @@ -57,10 +66,27 @@ required:
>    - clocks
>    - clock-names
>    - interrupts
> +  - power-domains
> +  - power-domain-names

A new required property is an ABI break. Please explain why this is
acceptable in your commit message.

>  
>  additionalProperties: false
>  
>  allOf:
> +  # Cores with a single power domain
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            anyOf:
> +              - const: img,img-axe-1-16m
> +    then:
> +      properties:
> +        power-domains:
> +          minItems: 1
> +          maxItems: 1
> +        power-domain-names:
> +          items:
> +            - const: a
>    # Vendor integrations using a single clock domain
>    - if:
>        properties:
> @@ -90,4 +116,5 @@ examples:
>          clock-names = "core";
>          interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
>          power-domains = <&k3_pds 187 TI_SCI_PD_EXCLUSIVE>;
> +        power-domain-names = "a";
>      };
> 
> -- 
> 2.47.0
>
Conor Dooley Nov. 5, 2024, 6:13 p.m. UTC | #2
On Tue, Nov 05, 2024 at 06:05:54PM +0000, Conor Dooley wrote:
> On Tue, Nov 05, 2024 at 03:58:09PM +0000, Matt Coster wrote:
> > The single existing GPU (AXE-1-16M) only requires a single power domain.
> > Subsequent patches will add support for BXS-4-64 MC1, which has two power
> > domains. Add infrastructure now to allow for this.
> > 
> > Signed-off-by: Matt Coster <matt.coster@imgtec.com>
> > ---
> >  .../devicetree/bindings/gpu/img,powervr-rogue.yaml | 29 +++++++++++++++++++++-
> >  1 file changed, 28 insertions(+), 1 deletion(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
> > index 6924831d3e9dd9b2b052ca8f9d7228ff25526532..55f422be1bc5b7564e3e81f24c4b93857f3e12fe 100644
> > --- a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
> > +++ b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
> > @@ -49,7 +49,16 @@ properties:
> >      maxItems: 1
> >  
> >    power-domains:
> > -    maxItems: 1
> > +    minItems: 1
> > +    maxItems: 2
> > +
> > +  power-domain-names:
> > +    oneOf:
> > +      - items:
> > +          - const: a
> > +      - items:
> > +          - const: a
> > +          - const: b

Additionally, a & b? Are those actually the names for the power domains?

> >  
> >  required:
> >    - compatible
> > @@ -57,10 +66,27 @@ required:
> >    - clocks
> >    - clock-names
> >    - interrupts
> > +  - power-domains
> > +  - power-domain-names
> 
> A new required property is an ABI break. Please explain why this is
> acceptable in your commit message.
> 
> >  
> >  additionalProperties: false
> >  
> >  allOf:
> > +  # Cores with a single power domain
> > +  - if:
> > +      properties:
> > +        compatible:
> > +          contains:
> > +            anyOf:
> > +              - const: img,img-axe-1-16m
> > +    then:
> > +      properties:
> > +        power-domains:
> > +          minItems: 1
> > +          maxItems: 1
> > +        power-domain-names:
> > +          items:
> > +            - const: a
> >    # Vendor integrations using a single clock domain
> >    - if:
> >        properties:
> > @@ -90,4 +116,5 @@ examples:
> >          clock-names = "core";
> >          interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
> >          power-domains = <&k3_pds 187 TI_SCI_PD_EXCLUSIVE>;
> > +        power-domain-names = "a";
> >      };
> > 
> > -- 
> > 2.47.0
> >
Matt Coster Nov. 6, 2024, 10:18 a.m. UTC | #3
On 05/11/2024 18:13, Conor Dooley wrote:
> On Tue, Nov 05, 2024 at 06:05:54PM +0000, Conor Dooley wrote:
>> On Tue, Nov 05, 2024 at 03:58:09PM +0000, Matt Coster wrote:
>>> The single existing GPU (AXE-1-16M) only requires a single power domain.
>>> Subsequent patches will add support for BXS-4-64 MC1, which has two power
>>> domains. Add infrastructure now to allow for this.
>>>
>>> Signed-off-by: Matt Coster <matt.coster@imgtec.com>
>>> ---
>>>  .../devicetree/bindings/gpu/img,powervr-rogue.yaml | 29 +++++++++++++++++++++-
>>>  1 file changed, 28 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
>>> index 6924831d3e9dd9b2b052ca8f9d7228ff25526532..55f422be1bc5b7564e3e81f24c4b93857f3e12fe 100644
>>> --- a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
>>> +++ b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
>>> @@ -49,7 +49,16 @@ properties:
>>>      maxItems: 1
>>>  
>>>    power-domains:
>>> -    maxItems: 1
>>> +    minItems: 1
>>> +    maxItems: 2
>>> +
>>> +  power-domain-names:
>>> +    oneOf:
>>> +      - items:
>>> +          - const: a
>>> +      - items:
>>> +          - const: a
>>> +          - const: b
> 
> Additionally, a & b? Are those actually the names for the power domains?

Sadly yes, Rogue has power domains that are literally just A, B, etc. I
wouldn't believe me either; the attached image is taken directly from
the documentation for BXS-4-64.

>>>  
>>>  required:
>>>    - compatible
>>> @@ -57,10 +66,27 @@ required:
>>>    - clocks
>>>    - clock-names
>>>    - interrupts
>>> +  - power-domains
>>> +  - power-domain-names
>>
>> A new required property is an ABI break. Please explain why this is
>> acceptable in your commit message.

Strictly it's only necessary for multi-domain GPUs, or perhaps in
instances where the SoC power controller already enforces the
dependencies between power domains. In reality, I think it was simply an
oversight not to enfore this requirement in the first place. We have
very, very few cores that require <2 power domains so names are always
required if domains are enumerated in dt.

Would you prefer we drop the requirement for "power-domains" and gate
the requirement for "power-domain-names" behind >2 domains, or just
explain the change properly and make the ABI break now while only one
core is supported?

Cheers,
Matt

>>>  additionalProperties: false
>>>  
>>>  allOf:
>>> +  # Cores with a single power domain
>>> +  - if:
>>> +      properties:
>>> +        compatible:
>>> +          contains:
>>> +            anyOf:
>>> +              - const: img,img-axe-1-16m
>>> +    then:
>>> +      properties:
>>> +        power-domains:
>>> +          minItems: 1
>>> +          maxItems: 1
>>> +        power-domain-names:
>>> +          items:
>>> +            - const: a
>>>    # Vendor integrations using a single clock domain
>>>    - if:
>>>        properties:
>>> @@ -90,4 +116,5 @@ examples:
>>>          clock-names = "core";
>>>          interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
>>>          power-domains = <&k3_pds 187 TI_SCI_PD_EXCLUSIVE>;
>>> +        power-domain-names = "a";
>>>      };
>>>
>>> -- 
>>> 2.47.0
>>>
Conor Dooley Nov. 6, 2024, 6:28 p.m. UTC | #4
On Wed, Nov 06, 2024 at 10:18:01AM +0000, Matt Coster wrote:
> On 05/11/2024 18:13, Conor Dooley wrote:
> > On Tue, Nov 05, 2024 at 06:05:54PM +0000, Conor Dooley wrote:
> >> On Tue, Nov 05, 2024 at 03:58:09PM +0000, Matt Coster wrote:
> >>> The single existing GPU (AXE-1-16M) only requires a single power domain.
> >>> Subsequent patches will add support for BXS-4-64 MC1, which has two power
> >>> domains. Add infrastructure now to allow for this.
> >>>
> >>> Signed-off-by: Matt Coster <matt.coster@imgtec.com>
> >>> ---
> >>>  .../devicetree/bindings/gpu/img,powervr-rogue.yaml | 29 +++++++++++++++++++++-
> >>>  1 file changed, 28 insertions(+), 1 deletion(-)
> >>>
> >>> diff --git a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
> >>> index 6924831d3e9dd9b2b052ca8f9d7228ff25526532..55f422be1bc5b7564e3e81f24c4b93857f3e12fe 100644
> >>> --- a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
> >>> +++ b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
> >>> @@ -49,7 +49,16 @@ properties:
> >>>      maxItems: 1
> >>>  
> >>>    power-domains:
> >>> -    maxItems: 1
> >>> +    minItems: 1
> >>> +    maxItems: 2
> >>> +
> >>> +  power-domain-names:
> >>> +    oneOf:
> >>> +      - items:
> >>> +          - const: a
> >>> +      - items:
> >>> +          - const: a
> >>> +          - const: b
> > 
> > Additionally, a & b? Are those actually the names for the power domains?
> 
> Sadly yes, Rogue has power domains that are literally just A, B, etc. I
> wouldn't believe me either; the attached image is taken directly from
> the documentation for BXS-4-64.

heh, nice... Also - if you have the oneOf stuff here for the same reason
as the locks, the same logic with min/maxItems applies here.

> 
> >>>  
> >>>  required:
> >>>    - compatible
> >>> @@ -57,10 +66,27 @@ required:
> >>>    - clocks
> >>>    - clock-names
> >>>    - interrupts
> >>> +  - power-domains
> >>> +  - power-domain-names
> >>
> >> A new required property is an ABI break. Please explain why this is
> >> acceptable in your commit message.
> 
> Strictly it's only necessary for multi-domain GPUs, or perhaps in
> instances where the SoC power controller already enforces the
> dependencies between power domains. In reality, I think it was simply an
> oversight not to enfore this requirement in the first place. We have
> very, very few cores that require <2 power domains so names are always
> required if domains are enumerated in dt.
> 
> Would you prefer we drop the requirement for "power-domains" and gate
> the requirement for "power-domain-names" behind >2 domains, or just
> explain the change properly and make the ABI break now while only one
> core is supported?

I dunno, depends really on whether or not it is possible to have power
domain "a" and domain "c" in a rogue gpu. If "a" and "b" is all it will
ever be, the order is fixed by the binding and you can do
genpd_dev_pm_attach_by_id() instead of genpd_dev_pm_attach_by_name().
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
index 6924831d3e9dd9b2b052ca8f9d7228ff25526532..55f422be1bc5b7564e3e81f24c4b93857f3e12fe 100644
--- a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
+++ b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
@@ -49,7 +49,16 @@  properties:
     maxItems: 1
 
   power-domains:
-    maxItems: 1
+    minItems: 1
+    maxItems: 2
+
+  power-domain-names:
+    oneOf:
+      - items:
+          - const: a
+      - items:
+          - const: a
+          - const: b
 
 required:
   - compatible
@@ -57,10 +66,27 @@  required:
   - clocks
   - clock-names
   - interrupts
+  - power-domains
+  - power-domain-names
 
 additionalProperties: false
 
 allOf:
+  # Cores with a single power domain
+  - if:
+      properties:
+        compatible:
+          contains:
+            anyOf:
+              - const: img,img-axe-1-16m
+    then:
+      properties:
+        power-domains:
+          minItems: 1
+          maxItems: 1
+        power-domain-names:
+          items:
+            - const: a
   # Vendor integrations using a single clock domain
   - if:
       properties:
@@ -90,4 +116,5 @@  examples:
         clock-names = "core";
         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
         power-domains = <&k3_pds 187 TI_SCI_PD_EXCLUSIVE>;
+        power-domain-names = "a";
     };