| Message ID | 20241106123304.422854-3-heiko@sntech.de (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | drm/rockchip: Add driver for the new DSI2 controller | expand |
On Wed, 06 Nov 2024 13:33:03 +0100, Heiko Stuebner wrote: > From: Heiko Stuebner <heiko.stuebner@cherry.de> > > The Display Serial Interface 2 (DSI-2) is part of a group of communication > protocols defined by the MIPI Alliance. The RK3588 implements this > specification in its two MIPI DSI-2 Host Controllers that are based on a > new Synopsis IP. > > Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> > --- > .../rockchip/rockchip,rk3588-mipi-dsi2.yaml | 119 ++++++++++++++++++ > 1 file changed, 119 insertions(+) > create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip,rk3588-mipi-dsi2.yaml > My bot found errors running 'make dt_binding_check' on your patch: yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3588-mipi-dsi2.yaml: $id: Cannot determine base path from $id, relative path/filename doesn't match actual path or filename $id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-mipi-dsi2.yaml file: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3588-mipi-dsi2.yaml doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20241106123304.422854-3-heiko@sntech.de The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
On Wed, Nov 06, 2024 at 01:33:03PM +0100, Heiko Stuebner wrote: > From: Heiko Stuebner <heiko.stuebner@cherry.de> > > The Display Serial Interface 2 (DSI-2) is part of a group of communication > protocols defined by the MIPI Alliance. The RK3588 implements this > specification in its two MIPI DSI-2 Host Controllers that are based on a > new Synopsis IP. > > Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> > --- > .../rockchip/rockchip,rk3588-mipi-dsi2.yaml | 119 ++++++++++++++++++ > 1 file changed, 119 insertions(+) > create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip,rk3588-mipi-dsi2.yaml > > diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3588-mipi-dsi2.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3588-mipi-dsi2.yaml > new file mode 100644 > index 000000000000..8fc6b4a63f06 > --- /dev/null > +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3588-mipi-dsi2.yaml > @@ -0,0 +1,119 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-mipi-dsi2.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Rockchip specific extensions to the Synopsys Designware MIPI DSI2 > + > +maintainers: > + - Heiko Stuebner <heiko@sntech.de> > + > +properties: > + compatible: > + enum: > + - rockchip,rk3588-mipi-dsi2 > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + clocks: > + maxItems: 2 > + > + clock-names: > + items: > + - const: pclk > + - const: sys > + > + rockchip,grf: > + $ref: /schemas/types.yaml#/definitions/phandle > + description: > + This SoC uses GRF regs to switch between vopl/vopb. > + > + phys: > + maxItems: 1 > + > + phy-names: > + const: dcphy > + > + ports: Nodes after properties. > + $ref: /schemas/graph.yaml#/properties/ports > + > + properties: > + port@0: > + $ref: /schemas/graph.yaml#/properties/port > + description: Input node to receive pixel data. > + > + port@1: > + $ref: /schemas/graph.yaml#/properties/port > + description: DSI output node to panel. > + > + required: > + - port@0 > + - port@1 > + > + power-domains: > + maxItems: 1 > + > + resets: > + maxItems: 1 > + > + reset-names: > + const: apb > + > +required: > + - compatible > + - clocks > + - clock-names > + - rockchip,grf > + - phys > + - phy-names > + - ports > + - reg > + > +allOf: > + - $ref: ../dsi-controller.yaml# Absolute path: /schemas/... > + > +unevaluatedProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/rockchip,rk3588-cru.h> > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/interrupt-controller/irq.h> > + #include <dt-bindings/power/rk3588-power.h> > + #include <dt-bindings/reset/rockchip,rk3588-cru.h> > + > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + > + dsi0: dsi@fde20000 { Drop unused labels. > + compatible = "rockchip,rk3588-mipi-dsi2"; > + reg = <0x0 0xfde20000 0x0 0x10000>; > + interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH 0>; > + clocks = <&cru PCLK_DSIHOST0>, <&cru CLK_DSIHOST0>; > + clock-names = "pclk", "sys"; > + resets = <&cru SRST_P_DSIHOST0>; > + reset-names = "apb"; > + power-domains = <&power RK3588_PD_VOP>; > + phys = <&mipidcphy0>; > + phy-names = "dcphy"; > + rockchip,grf = <&vop_grf>; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + dsi0_in: port@0 { > + reg = <0>; > + }; > + > + dsi0_out: port@1 { > + reg = <1>; > + }; > + }; > + }; > + }; > -- > 2.45.2 >
diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3588-mipi-dsi2.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3588-mipi-dsi2.yaml new file mode 100644 index 000000000000..8fc6b4a63f06 --- /dev/null +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3588-mipi-dsi2.yaml @@ -0,0 +1,119 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-mipi-dsi2.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip specific extensions to the Synopsys Designware MIPI DSI2 + +maintainers: + - Heiko Stuebner <heiko@sntech.de> + +properties: + compatible: + enum: + - rockchip,rk3588-mipi-dsi2 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 2 + + clock-names: + items: + - const: pclk + - const: sys + + rockchip,grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: + This SoC uses GRF regs to switch between vopl/vopb. + + phys: + maxItems: 1 + + phy-names: + const: dcphy + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: Input node to receive pixel data. + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: DSI output node to panel. + + required: + - port@0 + - port@1 + + power-domains: + maxItems: 1 + + resets: + maxItems: 1 + + reset-names: + const: apb + +required: + - compatible + - clocks + - clock-names + - rockchip,grf + - phys + - phy-names + - ports + - reg + +allOf: + - $ref: ../dsi-controller.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/rockchip,rk3588-cru.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/power/rk3588-power.h> + #include <dt-bindings/reset/rockchip,rk3588-cru.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + dsi0: dsi@fde20000 { + compatible = "rockchip,rk3588-mipi-dsi2"; + reg = <0x0 0xfde20000 0x0 0x10000>; + interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&cru PCLK_DSIHOST0>, <&cru CLK_DSIHOST0>; + clock-names = "pclk", "sys"; + resets = <&cru SRST_P_DSIHOST0>; + reset-names = "apb"; + power-domains = <&power RK3588_PD_VOP>; + phys = <&mipidcphy0>; + phy-names = "dcphy"; + rockchip,grf = <&vop_grf>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + dsi0_in: port@0 { + reg = <0>; + }; + + dsi0_out: port@1 { + reg = <1>; + }; + }; + }; + };