| Message ID | 20241107063637.2122726-4-leyfoon.tan@starfivetech.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 671672977012b8ef89fe4e6d6965a2e6b45f3523 |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | net: stmmac: dwmac4: Fixes issues in dwmac4 | expand |
On Thu, Nov 07, 2024 at 02:36:36PM +0800, Ley Foon Tan wrote: > The Receive Watchdog Timeout (RWT, bit[9]) is not part of Abnormal > Interrupt Summary (AIS). Move the RWT handling out of the AIS > condition statement. > > >From databook, the AIS is the logical OR of the following interrupt bits: > > - Bit 1: Transmit Process Stopped > - Bit 7: Receive Buffer Unavailable > - Bit 8: Receive Process Stopped > - Bit 10: Early Transmit Interrupt > - Bit 12: Fatal Bus Error > - Bit 13: Context Descriptor Error > > Signed-off-by: Ley Foon Tan <leyfoon.tan@starfivetech.com> Reviewed-by: Simon Horman <horms@kernel.org>
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c index 0d185e54eb7e..57c03d491774 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c @@ -185,8 +185,6 @@ int dwmac4_dma_interrupt(struct stmmac_priv *priv, void __iomem *ioaddr, x->rx_buf_unav_irq++; if (unlikely(intr_status & DMA_CHAN_STATUS_RPS)) x->rx_process_stopped_irq++; - if (unlikely(intr_status & DMA_CHAN_STATUS_RWT)) - x->rx_watchdog_irq++; if (unlikely(intr_status & DMA_CHAN_STATUS_ETI)) x->tx_early_irq++; if (unlikely(intr_status & DMA_CHAN_STATUS_TPS)) { @@ -198,6 +196,10 @@ int dwmac4_dma_interrupt(struct stmmac_priv *priv, void __iomem *ioaddr, ret = tx_hard_error; } } + + if (unlikely(intr_status & DMA_CHAN_STATUS_RWT)) + x->rx_watchdog_irq++; + /* TX/RX NORMAL interrupts */ if (likely(intr_status & DMA_CHAN_STATUS_RI)) { u64_stats_update_begin(&stats->syncp);
The Receive Watchdog Timeout (RWT, bit[9]) is not part of Abnormal Interrupt Summary (AIS). Move the RWT handling out of the AIS condition statement. From databook, the AIS is the logical OR of the following interrupt bits: - Bit 1: Transmit Process Stopped - Bit 7: Receive Buffer Unavailable - Bit 8: Receive Process Stopped - Bit 10: Early Transmit Interrupt - Bit 12: Fatal Bus Error - Bit 13: Context Descriptor Error Signed-off-by: Ley Foon Tan <leyfoon.tan@starfivetech.com> --- drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)